Infineon ICE2HS01G Скачать руководство пользователя страница 22

 

 

 

 
 
 

Application Note 

22 

2011-07-06 

 

 

 

Figure 12 

Waveforms for LLC converter with 

sw

f

>

r

f

(left) and 

sw

f

<

r

f

(right) 

2.4.5 SR 

Protections 

As the SR control in ICE2HS01G is realized with indirect method, there are some cases that the SR can 
not work properly. In this cases, the SR gate drive will be disabled. Once the condition is over, IC will 
restart the SR with SRSoftstart. 

During softstart, the SR is disabled.When the softstart pin voltage is higher than 1.9V for 20ms, SR will be 
enabled with SRSoftstart. 

When LOAD pin voltage is lower than 0.2V, IC will disable the SR immediately. If LOAD pin voltage is 
higher than 0.7V, IC will resume SR with SRSoftstart. 

During over-current protection phase, if the softstart pin voltage is lower than 1.8V, SR will be disabled. 
The SR will resume with softstart 10ms after SS pin voltage is higher than 1.9V again. 

In over-current protection, if the CS pin voltage is higher than 0.9V, SR is disabled. SR will be enabled 
with SRSoftstart after CS pin voltage is lower than 0.6V. 

All the above four conditions are built inside the IC. If IC detects such a condition, IC will disable SR and 
pull down the voltage on SRD pin to zero. 

When the CS voltage suddenly drops from 0.55V to below 0.30V within 1ms, the SR gate is turned off for 
1ms, after 1ms, SR operation is enabled again with SRsoftstart. 

If some fault conditions are not reflected on the four conditions mentioned above but can be detected 
outside with other measures, the SR can also be disabled and enabled with softstart from outside. This is 
implemented on SRD pin as well. The internal SRD reference voltage has limited current source 
capability. If a transistor QSRD is connected as shown in typical application circuit, the voltage on SRD 
pin can be pulled to zero if this transistor is turned on, which will stop the SR. If the SRD voltage is 
released and increases above 1.75V, SR is enabled with softstart. 

2.5 Design 

summary 

Figure 13 and 14 show the final schematic for the power stage and control circuit for the 300W LLC 
converter.  

Содержание ICE2HS01G

Страница 1: ...N e v e r s t o p t h i n k i n g Power Management Supply Design Guide for LLC Converter with ICE2HS01G Application Note V1 0 July 2011...

Страница 2: ...act your nearest Infineon Technologies Office www infineon com Warnings Due to technical requirements components may contain dangerous substances For information on the types in question please contac...

Страница 3: ...r LLC Converter with ICE2HS01 Revision History 2011 07 V1 0 Previous Version NA Design Guide for LLC Converter with ICE2HS01G License to Infineon Technologies Asia Pacific Pte Ltd A N P S 0 0 5 7 Liu...

Страница 4: ...mum Maximum frequency setting 10 2 3 3 Frequency setting for OCP 11 2 3 4 Dead time 12 2 3 5 Softstart time OLP blanking time and auto restart time 13 2 3 6 Load pin setting 13 2 3 7 Current sense 13...

Страница 5: ...th ICE2HS01G TL431 OPTO QPH CRES CO1 CO2 RBA1 RBA2 ROVS2 ROVS3 ROVS1 Roc Coc QPL CBUS RT CSS RFMIN Rreg ROCP RFT2 RFT1 RSS1 CSS1 QSH QSL IC Driver IC Driver Pulse Trans RINS1 RINS2 HG LG RINS3 VINS VC...

Страница 6: ...minimum input voltage can be given as 2 2 2 2 Selection of resonant factor m In order to achieve the highest efficiency possible the value of resonant factor r r m r p L L L L L m is to be set as big...

Страница 7: ...19 1 1 2 337 400 min _ _ max nom in nom in M V V M 3 2 2 4 Transformer turns ratio Assuming the drain source voltage drop of secondary side MOSFET V Vf 1 0 the transformer turns ratio will be 5 16 1 1...

Страница 8: ...rQ we can calculate the r C r L and p L as follows nF R f Q C eff r r 66 106 10 85 268 0 2 1 2 1 3 8 uH C f L r r r 53 10 66 10 85 2 1 2 1 9 2 3 2 9 uH mL L r p 690 2 2 6 1 Resonant choke design The m...

Страница 9: ...gain 28 1 pk G Accordingly the actual minimum frequency min f is kHz f F f r 30 10 85 35 0 3 min The voltage across the primary winding can be calculated as f o p V V n V The half switching cycle peri...

Страница 10: ...quency setting The IC internal circuit provides a regulated 2V voltage at FREQ pin The effective resistance presented between the FREQ pin and GND determines the current flowing out of the FREQ pin wh...

Страница 11: ...equation we get 0 1 1 min 2 2 Q M m F m F Q F G 15 The corresponding normalized frequency max F can be found by 13 2 1 1 min mM m F Therefore kHz kHz F f 180 85 max For 180 kHz switching frequency the...

Страница 12: ...99CP at maximum switching frequency where the magnetizing current to charge and discharge ds C is the minimum The magnetizing current at the end of each switching cycle can be calculated as 18 The req...

Страница 13: ...T BL T TH T T OLP 240 10 20 10 4 1 ln 10 10 1000 20 1 ln 20 6 6 6 6 The restart time can be calculated as ms V V C R T TH TL T T restart 2030 1000 4 525 0 ln 10 10 ln 6 6 2 3 6 Load pin setting One of...

Страница 14: ...divider r cs ocp r cs cs ocp C C C I C C C I I cs 1 1 1 1 21 One major design criterion for the current sense is to ensure Over Current Protection OCP Accordingly we can also obtain 2 8 0 2 2 2 1 cs R...

Страница 15: ...for INSL R is 24k The blanking time for leaving brown out is around 500 s and for entering brown out is around 50 s Please note that the calculation above is based on typical specification values of t...

Страница 16: ...burst mode will be disabled After the selection is done the current source sele I is turned off A blanking time of 320 s is given before IC starts to sense the EnA pin voltage latch off enable purpos...

Страница 17: ...the gate signals from IC to the actual MOSFET In this operation condition sw f r f the SR MOSFET conduction period on time depends on the primary gate switching frequency From Figure 7 right the curr...

Страница 18: ...depends on the resonant frequency when LLC converter operates below resonant frequency sw f r f Considering the primary side dead time DEAD T and the SR gate turn on delay delay on T _ will be discus...

Страница 19: ...pin 2V Therefore the SR on time in such conditions is determined by SRD R only and is equal to max _ on T In case of light load with low CS voltage CS V the CL V is reduced to be lower than 2V and ex...

Страница 20: ...The turn on delay function is built in ICE2HS01G for such purpose When the sensed input voltage at VINS pin is higher than the reference voltage set by Vres pin according to the resonant voltage SR tu...

Страница 21: ...turn off delay delay off T _ simplified typical waveforms can be drawn in Figure 12 for the two conditions when sw f r f and sw f r f From the waveforms on the left the switch on of the SR MOSFET is...

Страница 22: ...9V SR is disabled SR will be enabled with SRSoftstart after CS pin voltage is lower than 0 6V All the above four conditions are built inside the IC If IC detects such a condition IC will disable SR an...

Страница 23: ..._SLG S_LG S_HG P_Vreg S_HD S_HS S_LD S_LS 12V 12V C121 10u C122 100n C118 1n0 INB OUTB OUTA INA GND NC VDD NC IC300 UCC27324_1 12V S_LG S_HG Figure 13 Power stage circuit of the half bridge LLC conver...

Страница 24: ...the red curves in the circuit diagram below 2 Connect driver IC input ground to IC VCC Ecap ground 3 Connect driver IC output ground to low side MOS source with short path 4 A 100nF filtering cap sho...

Страница 25: ...resistor ground 2 Connetc the following ground with min F R ground refer to the green curves SS cap ground Opto coupler ground 3 Connect SR pulse transformer and driving circuit ground to VCC Ecap gro...

Страница 26: ...n Note 26 2011 07 06 References 1 Infineon Technologies ICE2HS01 High Performance Resonant Mode Controller for Half bridge LLC Resonant Converter datasheet Ver 2 0 Infineon Technologies Munich Germany...

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