CYTVII-B-H-1M-176-CPU Evaluation Board User Guide, Document Number: 002-25907 Rev. *A
37
Figure A-10. Schematic (10/27)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
DEFAULT CLOSE
Footprint of J5 Should be
compatible with a 0E
resistor
PUSH BUTTON
DEFAULT CLOSE
USER LED
DEFAULT CLOSE
Footprint of J5 Should be
compatible with a 0E
resistor
HIBERNATE WAKEUP
DEFAULT CLOSE
DEFAULT CLOSE
Footprint of J5 Should be
compatible with a 0E
resistor
VDDD
VDDD
VDDD
USER_SW1 {5}
USER_LED1
{5}
HIBERNATE_WAKEUP {8}
USER_LED2
{5}
USER_SW2 {5}
SCH Title :
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CYPRESS SEMICONDUCTOR © 2018
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CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
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2
2
0
3
2
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TVII-B-H-8M 176 CPU Board Rev B
A4
11
29
Wednesday, February 20, 2019
GPIO
KOST
TUSA
SCH Title :
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CYPRESS SEMICONDUCTOR © 2018
Page Title :
Drawn By
CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
1
0
2
2
0
3
2
4
6
TVII-B-H-8M 176 CPU Board Rev B
A4
11
29
Wednesday, February 20, 2019
GPIO
KOST
TUSA
SCH Title :
v
e
R
r
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b
m
u
N
t
n
e
m
u
c
o
D
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z
i
S
t
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h
S
:
e
t
a
D
of
CYPRESS SEMICONDUCTOR © 2018
Page Title :
Drawn By
CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
1
0
2
2
0
3
2
4
6
TVII-B-H-8M 176 CPU Board Rev B
A4
11
29
Wednesday, February 20, 2019
GPIO
KOST
TUSA
SW3
PTS810 SJG 250 SMTR LFS
1
3
2
4
C37
0.1uF
J14
HDR_1X2
1
2
R32
1K
C36
0.1uF
SW2
PTS810 SJG 250 SMTR LFS
1
3
2
4
C35
0.1uF
J17
HDR_1X2
1
2
R31
1K
R29
10K
R28
20E
LED4
LTST-C150GKT
2
1
R25
10K
SW4
PTS810 SJG 250 SMTR LFS
1
3
2
4
LED5
LTST-C150GKT
2
1
J15
HDR_1X2
1
2
J13
HDR_1X2
1
2
J16
HDR_1X2
1
2
R27
10K
R26
20E
R30
20E
GPIO_SW1_R
GPIO_SW1
GPIO_LED1
GPIO_LED1_R
GPIO_HW_R
GPIO_HW
GPIO_LED2
GPIO_LED2_R
GPIO_SW2_R
GPIO_SW2