CYTVII-B-H-1M-176-CPU Evaluation Board User Guide, Document Number: 002-25907 Rev. *A
34
Figure A-7. Schematic (7/27)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
GPIO_P19_0
{14}
GPIO_P19_1
{14}
GPIO_P19_2
{14}
GPIO_P19_4
{14}
CPU_WCO_IN
{10}
CPU_WCO_OUT
{10}
CPU_ECO_IN
{10}
CPU_ECO_OUT
{10}
HIBERNATE_WAKEUP
{8,11}
CPU_XRES
{8,12,13,14,18,20,22}
DRV_VOUT
{3,4,8}
EXT_PS_CTL0
{3,4}
EXT_PS_CTL1
{3,4}
GPIO_P22_3
{25}
SWJ_SWO_TDO
{14}
SWJ_SWCLK_TCLK
{14}
SWJ_SWDIO_TMS
{14}
SWJ_SWDOE_TDI
{14}
GPIO_P19_3
{14}
BB_LIN0_RXD
{27}
TRACE_CLOCK
{8,13,14}
BB_LIN2_RXD
{27}
BB_LIN2_TXD
{27}
BB_LIN2_SLP
{28}
BB_CAN5_TXD
{26}
BB_CAN5_RXD
{26}
BB_CAN7_TXD
{8,26}
BB_CAN7_RXD
{8,26}
BB_LIN0_TXD
{27}
BB_LIN0_SLP
{27}
BB_LIN3_RXD
{28}
BB_LIN3_TXD
{28}
BB_LIN3_SLP
{28}
BB_CAN3_RXD
{28}
BB_CAN3_TXD
{28}
BB_CAN5_S
{25}
GPIO_P23_2
{25}
BB_CAN7_WAKE
{25}
BB_CAN7_TXD
{8,26}
BB_CAN7_RXD
{8,26}
HIBERNATE_WAKEUP
{8,11}
CPU_XRES
{8,12,13,14,18,20,22}
TRACE_CLOCK
{8,13,14}
DRV_VOUT
{3,4,8}
SCH Title :
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CYPRESS SEMICONDUCTOR © 2018
Page Title :
Drawn By
CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
1
0
2
2
0
3
2
4
6
TVII-B-H-8M 176 CPU Board Rev B
A4
8
29
Wednesday, February 20, 2019
TVII-B-H-8M 176 CPU P4
KOST
TUSA
SCH Title :
v
e
R
r
e
b
m
u
N
t
n
e
m
u
c
o
D
e
z
i
S
t
e
e
h
S
:
e
t
a
D
of
CYPRESS SEMICONDUCTOR © 2018
Page Title :
Drawn By
CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
1
0
2
2
0
3
2
4
6
TVII-B-H-8M 176 CPU Board Rev B
A4
8
29
Wednesday, February 20, 2019
TVII-B-H-8M 176 CPU P4
KOST
TUSA
SCH Title :
v
e
R
r
e
b
m
u
N
t
n
e
m
u
c
o
D
e
z
i
S
t
e
e
h
S
:
e
t
a
D
of
CYPRESS SEMICONDUCTOR © 2018
Page Title :
Drawn By
CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
1
0
2
2
0
3
2
4
6
TVII-B-H-8M 176 CPU Board Rev B
A4
8
29
Wednesday, February 20, 2019
TVII-B-H-8M 176 CPU P4
KOST
TUSA
TP239
DNI
TP232
DNI
TP240
DNI
TP244
DNI
TP247
DNI
U3D
TVII_B_H_8M_176
P23.2/PWM1_M_10/PWM1_M_9_N/TC1_M_10_TR0/TC1_M_9_TR1/SCB7_RTS/SCB7_SCL/SCB7_CLK/LIN6_RX/FAULT_OUT_2
170
P23.1/PWM1_M_9/PWM1_M_8_N/TC1_M_9_TR0/TC1_M_8_TR1/SCB7_TX/SCB7_SDA/SCB7_MOSI/CAN1_0_RX/FAULT_OUT_1
169
P23.0/PWM1_M_8/PWM1_27_N/TC1_M_8_TR0/TC1_27_TR1/TC1_H_8_TR1/SCB7_RX/LIN14_TX/SCB7_MISO/CAN1_0_TX/FAULT_OUT_0
168
P22.7/PWM1_27/PWM1_28_N/TC1_27_TR0/TC1_28_TR1/TC1_H_8_TR0/LIN14_RX/LIN7_EN
167
P22.6/PWM1_28/PWM1_29_N/TC1_28_TR0/TC1_29_TR1/PWM1_H_8_N/LIN7_TX
166
P22.5/PWM1_29/PWM1_30_N/TC1_29_TR0/TC1_30_TR1/PWM1_H_8/SCB6_SEL2/LIN7_RX
165
P22.4/PWM1_30/PWM1_31_N/TC1_30_TR0/TC1_31_TR1/SCB6_SEL1/TRACE_CLOCK
164
P22.3/PWM1_31/PWM1_32_N/TC1_31_TR0/TC1_32_TR1/SCB6_CTS/SCB6_SEL0/TRACE_DATA_3/EXT_PS_CTL2
163
P22.2/PWM1_32/PWM1_33_N/TC1_32_TR0/TC1_33_TR1/SCB6_RTS/SCB6_SCL/SCB6_CLK/TRACE_DATA_2/EXT_PS_CTL1
162
P22.1/PWM1_33/PWM1_34_N/TC1_33_TR0/TC1_34_TR1/SCB6_TX/SCB6_SDA/SCB6_MOSI/CAN1_1_RX/TRACE_DATA_1/EXT_PS_CTL0
161
P21.7/PWM1_35/PWM1_36_N/TC1_35_TR0/TC1_36_TR1/SCB6_RX/SCB6_MISO/LIN0_EN/LIN13_TX/CAL_SUP_NZ/RTC_CAL
159
P21.6/PWM1_36/PWM1_37_N/TC1_36_TR0/TC1_37_TR1/LIN0_TX/LIN13_RX
158
P21.5/PWM1_37/PWM1_38_N/TC1_37_TR0/TC1_38_TR1/PWM1_34/PWM1_35_N/TC1_34_TR0/TC1_35_TR1/LIN0_RX/CAN1_1_TX/TRACE_DATA_0
157
P21.4/PWM1_38/PWM1_39_N/TC1_38_TR0/TC1_39_TR1/HIBERNATE_WAKEUP[0]
151
P21.3/PWM1_39/PWM1_40_N/TC1_39_TR0/TC1_40_TR1/ECO_OUT
150
P21.2/PWM1_40/PWM1_41_N/TC1_40_TR0/TC1_41_TR1/EXT_CLK/TRIG_DBG[1]/ECO_IN
149
P21.1/PWM1_41/PWM1_42_N/TC1_41_TR0/TC1_42_TR1/WCO_OUT
148
P21.0/PWM1_42/PWM1_43_N/TC1_42_TR0/TC1_43_TR1/SCB1_SEL2/WCO_IN
147
P20.7/PWM1_43/PWM1_44_N/TC1_43_TR0/TC1_44_TR1/SCB1_SEL1/CAN1_4_RX
146
P20.6/PWM1_44/PWM1_45_N/TC1_44_TR0/TC1_45_TR1/SCB1_CTS/SCB1_SEL0/CAN1_4_TX
145
P20.5/PWM1_45/PWM1_46_N/TC1_45_TR0/TC1_46_TR1/SCB1_RTS/SCB1_SCL/SCB1_CLK
144
P20.4/PWM1_46/PWM1_47_N/TC1_46_TR0/TC1_47_TR1/SCB1_TX/SCB1_SDA/SCB1_MOSI/CAN1_2_RX
143
P20.3/PWM1_47/PWM1_48_N/TC1_47_TR0/TC1_48_TR1/SCB1_RX/SCB1_MISO/CAN1_2_TX
142
P20.2/PWM1_48/PWM1_49_N/TC1_48_TR0/TC1_49_TR1/TC1_H_3_TR1/LIN5_EN/ADC[2]_31
141
P20.1/PWM1_49/PWM1_30_N/TC1_49_TR0/TC1_30_TR1/TC1_H_3_TR0/LIN5_TX/ADC[2]_30
140
P20.0/PWM1_30/PWM1_29_N/TC1_30_TR0/TC1_29_TR1/TC1_H_2_TR1/SCB2_SEL2/LIN5_RX/ADC[2]_29
139
P19.4/PWM1_29/PWM1_28_N/TC1_29_TR0/TC1_28_TR1/TC1_H_2_TR0/SCB2_SEL1/ADC[2]_28
138
P19.3/PWM1_28/PWM1_27_N/TC1_28_TR0/TC1_27_TR1/AUDIOSS0_RX_SDI/TC1_H_1_TR1/SCB2_SEL0/SCB2_CTS/TRIG_IN[29]/ADC[2]_27
137
P19.2/PWM1_27/PWM1_26_N/TC1_27_TR0/TC1_26_TR1/AUDIOSS0_RX_WS/TC1_H_1_TR0/SCB2_CLK/SCB2_SCL/SCB2_RTS/TRIG_IN[28]/ADC[2]_26
136
P19.1/PWM1_26/PWM1_M_3_N/TC1_26_TR0/TC1_M_3_TR1/AUDIOSS0_RX_SCK/TC1_H_0_TR1/SCB2_MOSI/SCB2_SDA/SCB2_TX/CAN1_3_RX/FAULT_OUT_3/ADC[2]_25
135
P19.0/PWM1_M_3/PWM1_50_N/TC1_M_3_TR0/TC1_50_TR1/AUDIOSS0_CLK_I2S_IF/TC1_H_0_TR0/SCB2_MISO/SCB2_RX/CAN1_3_TX/FAULT_OUT_2/ADC[2]_24
134
DRV_VOUT
160
P23.3/PWM1_M_11/PWM1_M_10_N/TC1_M_11_TR0/TC1_M_10_TR1/SCB7_CTS/SCB7_SEL0/LIN6_TX/FAULT_OUT_3/TRIG_IN[30]
171
P23.4/PWM1_25/PWM1_M_11_N/TC1_25_TR0/TC1_M_11_TR1/PWM1_H_9/SCB2_MISO/SCB7_SEL1/TRIG_DBG[0]/SWJ_SWO_TDO/TRIG_IN[31]
172
P23.5/PWM1_24/PWM1_25_N/TC1_24_TR0/TC1_25_TR1/LIN9_RX/PWM1_H_9_N/SCB2_MOSI/SCB7_SEL2/SWJ_SWCLK_TCLK
173
P23.6/PWM1_23/PWM1_24_N/TC1_23_TR0/TC1_24_TR1/LIN9_TX/TC1_H_9_TR0/SCB2_CLK/SWJ_SWDIO_TMS
174
P23.7/PWM1_22/PWM1_23_N/TC1_22_TR0/TC1_23_TR1/EXT_CLK/LIN9_EN/TC1_H_9_TR1/SCB2_SEL0/CAL_SUP_NZ/SWJ_SWDOE_TDI/HIBERNATE_WAKEUP[1]
175
XRES
152
TP234
DNI