IEI Technology WSB-Q354, Руководство пользователя

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WSB-Q354 PICMG 1.0 CPU Card
Page 16
Figure 2-7: DMI Chip-to-Chip Connection
Some of the features of the DMI include:
2.0 GBps point-to-point DMI to ICH9R (1.0 GBps in each direction)
100 MHz reference clock (shared with PCI Express* Graphics Attach)
32-bit downstream addressing
APIC and MSI interrupt messaging support
Message Signaled Interrupt (MSI) messages
SMI, SCI and SERR error indication
2.5 Intel
®
ICH9R Southbridge Chipset
2.5.1 Intel
®
ICH9R Overview
The Intel® ICH9R Southbridge chipset is connected to the Intel® Q35 GMCH through the
chip-to-chip Direct Media Interface (DMI).The ICH9R Southbridge chipset on the
WSB-Q354 has the features listed below.
Complies with PCI Express Base Specification, Revision 1.1
Complies with PCI Local Bus Specification, Revision 2.3 and supports 33MHz
PCI operations
Supports ACPI Power Management Logic
Contains:
o
Enhanced DMA controller