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Appendix A Watchdog Timer
Watchdog Timer is provided to ensure that standalone systems can always recover
from catastrophic conditions that cause the CPU to crash. This condition may
have occurred by external EMI or a software bug. When the CPU stops working
correctly, hardware on the board will perform a hardware reset (cold boot) to bring
the system back to a known state.
The Watch-Dog Timer is controlled by three I/O ports.
443
Write
Set Watchdog Time period
443 (hex)
Read
Enable the refresh the Watchdog Timer.
843/043 (hex)
Read
Disable the Watchdog Timer.
To enable the Watchdog Timer, user has to define Timer before enable the
Watchdog Timer function. The output data is a value of time interval and the
range of the value is from 01(hex) to FF (hex) and time interval 1 sec to 255 sec.
Data Time
Interval
01 1
sec
02 2
sec
03 3
sec
04 4
sec
.
.
.
.
.
.
FF 255
sec
This will enable and activate the countdown timer which will eventually time out
and reset the CPU to ensure that this reset condition does not occur, the Watch-Dog
Timer must be periodically refreshed by reading the same I/O port 043H and 443H.
This must be done within the time out period that is selected by software, please
refer to the example program.
