IEI Technology tKINO-AL, Руководство пользователя

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tKINO-AL SBC
Page 112
analog signals.
DDR Double Data Rate refers to a data bus transferring data on both the
rising and falling edges of the clock signal.
DMA Direct Memory Access (DMA) enables some peripheral devices to
bypass the system processor and communicate directly with the
system memory.
DIMM Dual Inline Memory Modules are a type of RAM that offer a 64-bit data
bus and have separate electrical contacts on each side of the module.
EHCI The Enhanced Host Controller Interface (EHCI) specification is a
register-level interface description for USB 2.0 Host Controllers.
GbE Gigabit Ethernet (GbE) is an Ethernet version that transfers data at 1.0
Gbps and complies with the
2
IEEE 802.3-2005 standard.
GPIO General purpose input
IrDA Infrared Data Association (IrDA) specify infrared data transmission
protocols used to enable electronic devices to wirelessly communicate
with each other.
L1 Cache The Level 1 Cache (L1 Cache) is a small memory cache built into the
system processor.
L2 Cache The Level 2 Cache (L2 Cache) is an external processor memory cache.
MAC The Media Access Control (MAC) protocol enables several terminals or
network nodes to communicate in a LAN, or other multipoint networks.
PCIe PCI Express (PCIe) is a communications bus that uses dual data lines
for full-duplex (two-way) serial (point-to-point) communications between
the SBC components and/or expansion cards and the SBC chipsets.
Each line has a 2.5 Gbps data transmission rate and a 250 MBps
sustained data transfer rate.