IEI Technology IMB-X63 Series, Руководство пользователя

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Chapter 3 BIOS Setup
31
User’s Manual
3.5 Advanced Chipset Features
When you select the ADVANCED CHIPSET FEATURES SETUP on the main program, the screen display will
appears as:
Advanced Chipset Features Screen
Phoenix - Award BIOS CMOS Setup Utility
Advanced Chipset Features
Spread Spectrum [Disabled] Item Help
f
DRAM Clock/ Drive Control
[Press Enter] Menu Level
f
f
AGP & P2P Bridge Control [Press Enter]
f
CPU & PCI Bus Control
[Press Enter]
Memory Hole [Disabled]
System BIOS Cacheable [Enabled]
Video RAM Cacheable [Enabled]
VGA Share Memory Size [16M]
Ç È ÆÅ
Move Enter: Select +/-/PU/PD: Value F10: Save Esc: Exit F1: General Help
F5: Previous Values F7: Optimized Defaults
Spread Spectrum: When the system clock generator pulses, the extreme values of the pulse generate
excess EMI. Enabling pulse spectrum spread modulation changes the extreme values from spikes to flat curves,
thus reducing EMI. This benefit may in some cases be outweighed by problems with timing-critical devices,
such as a clock-sensitive SCSI device.
DRAM Clock/Drive Control: To control the Clock. If you highlight the literal “Press Enter” next to the “DRAM
Clock” label and then press the enter key, it will take you a submenu with the following options:
DRAM Clock: This item determines DRAM clock following 100MHz, 133MHz or By SPD.
The Choices: 100MHz, 133MHz, By SPD (default).
AGP & P2P Bridge Control: Enter to Control AGP & P2P Bridge Item.
CPU & PCI Bus Control: Enter to Control CPU & PCI Bus Item.
Memory Hole: In order to improve performance, certain space in memory can be reserved for ISA cards.
This memory must be mapped into the memory space below 16MB.
System BIOS Cacheable: Selecting Enabled allows caching of the system BIOS ROM at F0000h - FFFFFh,
resulting in better system performance. However, if any program writes to this memory area, a system error
may result. The settings are Enabled and Disabled.