ID TECH SecureHead SPI with TMIV User Manual
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changed on a rising edge.
o
For clock phase = 1, data are read on clock's rising edge and data are
changed on a falling edge.
The signal is required to read card data from the device. The device default uses clock phase = 0 and
clock polarity = 0. Custom defaults for device clock phase and polarity are available upon request.
The following picture shows an example of regular TM4 SPI firmware with clock polarity = 0 and clock
phase = 0. The data are read on the rising edge of the clock and changed on the falling edge. On MOSI
line, the host sends out data of 00000010, or 02h (0x02).
3.3.
Master Input, Slave Output (MISO)
The MISO signal is the serial data output sent from for the device. It is also the data line that is
received by the host. When the device is not active (Chip Select is high), the MISO becomes high
impedance (disconnected). The MISO signal would be in an indeterminate state after the device is
power-cycled or reset for a maximum of 1 second. This signal should be ignored during this time.