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©2019 Integrated Device Technology, Inc.
June 17, 2019
VersaClock
®
6E – 5P49V6965 and 5P49V6975 Programmer Board User Guide
JP1 and JP5 Functionality
JP5 is the CLK0 output (OUT0) of the 5P49V6965/6975. The upper pin is ground and the lower pin is the actual output. Connect a probe
between the upper (GND) and lower (OUT0) pins to measure the OUT0 frequency or waveform. JP1 can be used to select the operating
Mode to be either I2C Mode or Hardware Select Mode. The mode is selected at power up so at the moment the board is plugged into a
USB port. The proper method for using JP1 is to first unplug the board from USB, then change the JP1 jumper and plug the board back
into a USB port. No jumper on JP1 selects the I2C mode where Timing Commander can communicate with the device. Having a jumper
installed on JP1 selects the Hardware Select Mode for selecting a pre-programmed configuration with the SEL0 and SEL1 jumpers.
Figure 7. JP1 Jumper and JP5 Pins
JP7, JP9, JP10 and JP11 Functionality
These four 2 × 2 test points are connected to the four differential outputs on the 5P49V6965/6975. The lower two pins are ground and the
upper two pins are the actual output pins. A probe can be used to check the outputs, to measure the frequency or to check the waveform
with an oscilloscope. Connect a single ended probe between a ground pin and output pin or connect a differential probe between the two
output pins. Note that the output pins connect directly to the pins on the chip and there are no additional components for termination or
biasing. For HCSL and LVPECL logic types, additional biasing is needed to allow the outputs to make sufficient signal swing.
Figure 8. JP7, JP9, JP10 and JP11 for CLK1, 2, 3 and 4 (OUT1, 2, 3 and 4)
