IDT VersaClock 3S Скачать руководство пользователя страница 6

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JULY 13, 2016

VERSACLOCK

3S - 5P35021 Evaluation Board

Board Schematics

Evaluation board schematics are shown on the following pages.

Figure 5. Evaluation Board Schematic (I)

Once configured, new options will be available on a
green background indicating that the EVB has
successfully connected with the board.

–

Write the setting to the device by clicking on the write all
registers to the chip option

All intended outputs should be available for
measurement.

–

Step No.

Steps

Comments

Содержание VersaClock 3S

Страница 1: ...o the family of programmable devices in IDT s Timing portfolio When the board is connected to a PC running IDT Timing Commander Software through USB the device can be configured and programmed to gene...

Страница 2: ...in different modes 5 Differential clock input CLKIN CLKINB A differential clock can be connected as source for the device 5 cont Single ended clock input CLKINB A Single ended clock can be connected...

Страница 3: ...will select power source from on board voltage regulators powered by USB Jumping to the Pin configuration as shown Figure 2B will select the bench power supply Output Clock Voltages Like VDDA and VDD...

Страница 4: ...ious voltages for the core as well as for each output The board can also be powered by a bench power supply by connecting two banana jacks J17 J18 for output and core voltages respectively Please see...

Страница 5: ...OE1 SMA_OE2 SMA_OE3 High or 1 D 4 6 8 OE1 OE2 OE3 High or 1 Step No Steps Comments 1 Set SCL_OFC1 Pin DIP Switch PIN 2 High or 1 2 Launch 5P35021 Timing Commander Software Refer to 5P35021 Timing Comm...

Страница 6: ...Evaluation Board Schematic I 7 Once configured new options will be available on a green background indicating that the EVB has successfully connected with the board 8 Write the setting to the device...

Страница 7: ...JULY 13 2016 7 VERSACLOCK 3S 5P35021 Evaluation Board Figure 6 Evaluation Board Schematic II Figure 7 Evaluation Board Schematic III...

Страница 8: ...utput clocks in LVPECL LVDS LVCMOS and HCSL signal types by populating or not populating some resistors DC or AC coupling of these outputs are also supported Table 5 and Table 6 below tabulates compon...

Страница 9: ...utput is applicable to LVCMOS which is the default configuration of the board Contact IDT if user wants to change termination configuration to support other output signal types Orderable Part Numbers...

Страница 10: ...d only as a guide and does not convey any license under intellectual property rights of IDT or any third parties IDT s products are not intended for use in applications involving extreme environmental...