1. Board Design
10
Tsi381 Evaluation Board User Manual
60E2000_MA001_03
Integrated Device Technology
www.idt.com
1.3
PCIe Interface
The Tsi381 evaluation board implements a single lane PCIe Interface. It is designed to connect to a
PCIe system with a standard x1 finger connector. The system must provide the REFCLK and PERSTN
signals. The PCIe Interface has the following design elements:
•
Supports Hot insertion and removal
•
Mid-bus logic analyzer pads for PCIe RXD/TXD signal probing
•
AC coupling on the TXD lanes
•
JTAG TDI - TDO loopback for chain continuity
1.4
Power Management
1.4.1
Power Regulation
The evaluation board’s power regulation is implemented as follows:
•
Digital 3.3V power supply available from DC/DC regulator or ATX supply
•
Digital 1.2V switching regulator
•
PCIe supplies filtered using EMI ferrite networks
To support PCI cards, the following additional power resources are included:
•
12V to 5V DC/DC converter
•
12V to 3.3V DC/DC converter
•
External power connectors – ATX 20-pin connector for supplying all power from an ATX power
supply
PCI_STOP#
Control signal
PCI_SERR#
System error
PCI_PERR#
Parity error
PCI_DEVSEL#
Device select line
PCI_INT#[A:D]
Interrupt line
PCI_PME#
PCI Power Management Event occurred
Table 2: PCI Pull-up Signals (Continued)
Signal
Description
