P9038 LAYOUT GUIDE
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08/23/15
AN-894
Figure 6. P9038 2-Layer Layout Critical VIN to SW1/SW2 Current Paths from Input Capacitors
It should be noted that the 0.1µF capacitor C18 is located the closest to the P9038 device because the lower capacitance and
ESL of the smaller package allow it to filter higher frequencies more effectively than physically larger components. Since these
are the highest priority signals to filter, it is imperative that the impedance from this component to IN and PGND is minimized.
Next, the three bulk capacitors C13, C15, and C17 are placed next to C18 and kept close to the device as well. The purpose of
this placement orientation is to stabilize the input during switching and to minimize the loop area of the current paths (green
arrows in
). Minimizing trace lengths will promote lower lead inductance which will result in less GND bounce induced
by the switching voltages and currents during operation. If the PGND/IN/SW connections change layers, each transition should
be made using at least 5 – 8 vias.
