10
©2019 Integrated Device Technology, Inc.
July 8, 2019
Microclock
®
5X1503/5L1503 Family Development Kit User Guide
Figure 13. Development Kit Evaluation Board Schematic
TP28
1
R93
NP_0
1
2
6V5
Tiny _GND
SCLK_Tiny
C23
0.1 uF
1
2
Tiny _GND
SDA_Tiny
TP31
1
R107
0
1
2
Tiny _GND
TP36
1
R105
0
1
2
GND
GND
Y2
25 MHz 8 pF_NP
4
1
2
3
TP37
1
Tiny _pull_low
VDD_1p8
CLKIN/X1
CLKINB/X2
TP32
1
R89
0
1
2
J6
CON5
1
1
2
2
CLKIN/X1
TP35
1
R101
0
1
2
SDA_Tiny
R110
0
1
2
C27
0.1 uF
1
2
R96
0
1
2
C26
NP_8pf
1
2
TP38
VDD1P8
1
R100
0
1
2
R103
0
1
2
TP26
1
R88
0
1
2
R97
0
1
2
TP30
1
Tiny _pull_low
6V5
VDD_1p8
TP39
1
VDD_1p8
Tiny _GND
Tiny _GND
TP29
1
R99
0
1
2
R104
0
1
2
TP40
1
SDA_Tiny
R102
10K
1
2
U13
5L1503
OE1
1
SE1
2
VDD
3
X2
4
X1
5
VSS
6
OUT3
7
VDDO
8
OE2
9
OUT2
10
R94
0
1
2
SCLK_Tiny
TP25
1
CLKINB/X2
TP34
1
C24
NP_0.1 uF
1
2
R90
0
1
2
Tiny _GND
R92
0
1
2
GND
R106
NP_0
1
2
U12
5X1503
SCL
1
SDA
2
OE1
3
OUT1
4
VDD
5
VSS
6
OUT3
7
VDDO
8
OE2
9
OUT2
10
J7
CON4
1
1
2
2
3
3
4
4
R109
0
1
2
VDD_1p8
R91
0
1
2
R108
NP_0
1
2
Title
Size
Document Number
Rev
Date:
Sheet
of
<Doc>
0.1
<Title>
A
2
2
Wednesday , February 06, 2019
TP33
1
VDD_1p8
6V5
Tiny _pull_low
R95
0
1
2
TP27
1
R98
NP_0
1
2
SCLK_Tiny
C25
NP_8pf
1
2