Integrated Device Technology
Quick start ADC1410S, ADC1210S, ADC1010S series
Quick start
© IDT 2012. All rights reserved.
Quick start
Rev. 06
— 2 July 2012
25 of 27
N
M
F
F
s
in
4. Appendix A.1: coherency calculation
The coherency relies on the fact that clock and analog input signal are synchronized
and the first and last samples being captured are adjoining samples: it ensures a
continuous digitized time process for the FFT processing.
To achieve this, one has to follow the equation:
where M is an odd integer
equal to the number of periods being
acquired and N the
number of samples acquired.
With Fin, Fs and N known, M has to be chosen such that it follows the equation
above. To do this iterative calculation, one has to decide whether Fin or Fs is fixed.
To illustrate this process, let’s consider our current example with Fin = 5 MHz, Fs =
122.88Msps and N = 65536 samples acquired:
if Fin is fixed, this leads to M = 2667 periods of input signal to be acquired and a real
sampling frequency to be Fs = 122.864642 MHz;
If Fs is fixed, this leads to M = 2667 periods of input signal to be acquired and a real
input frequency to be Fin = 5.000625 MHz.
Those values needs to be programmed in the signal generator and clock generator
before capture is done, otherwise the FFT calculation will lead to a non-coherent
result as shown below:
Fig 19.
SW_ADC_1_r02: “Acquisition” page, non-coherent capture example
The numbers given for SNR, SFDR are completely wrong if coherency is not respected.
