PCI LOCAL BUS SIGNAL DEFINITION
The PCI interface requires a minimum of 47 pins for a target-only
device and 49 pins for a master to handle data and addressing, inter-
face control, arbitration and system functions. The diagram below
shows the pins in functional groups, with required pins on the left
side and optional pins on the right side.
Required Pins:
Optional Pins:
Address & Data:
64-bit Extension:
AD[31::00]
AD[63::32]
C/BE[3::0]#
C/BE[7::4]#
PAR
PAR64
REQ64#
Interface Control:
ACK64#
FRAME#
TRDY#
Interface Control:
IRDY#
LOCK#
STOP#
INTA#
DEVSEL#
INTB#
IDSEL
INTC#
INTD#
Error Reporting:
PERR#
Cache Support:
SERR#
SBO#
SDONE
Arbitration
(masters only):
JTAG (IEEE 1149.1):
REQ#
TDI
GNT#
TDO
System:
TCK
CLK
TMS
RST#
TRST#
PCI Pin List
PCI
COMPLIANT
DEVICE
PCI REFERENCE
2-10
TECHNICAL REFERENCE
Содержание SB586TCP/166
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