ICS Endeavor Plus 810E, Руководство пользователя

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BIOS POST Check Point List 4-39
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4D The memory above 1MB has been cleared via soft reset. Saving the
memory size. Going to checkpoint 52h.
4E The memory test started, but not as the result of a soft reset. Displaying
the first 64kB memory size.
4F Memory size display started. This will be updated during the memory
test. Performing the sequential and random memory test.
50 Memory testing/initialization below 1MB completed. Adjust displayed
memory size for relocation and shadowing.
51 The memory size display was adjusted for relocation and shadowing.
Testing the memory above 1MB.
52 The memory above 1MB has been tested and initialized. Saving the mem-
ory size information.
53 The memory size information and the CPU registers are saved. Entering
real mode.
54
Shutdown was successful. The CPU is in real mode. Disabling the Gate
A20 line, parity, and the NMI.
57 The A20 address line, parity, and the NMI are disabled. Adjusting the
memory size depending on relocation and shadowing.
58
The memory size was adjusted for relocation and shadowing. Clearing
the “Hit [DEL]” message.
59 The “Hit [DEL]” message is cleared. The “[WAIT…]” message is
displayed. Starting the DMA and interrupt controller test.
60 The DMA page register test passed. DMA#1 base register test.
62 DMA#1 base register test passed. DMA#2 base register test.
65
DMA#2 base register test passed. To program DMA unit 1 and 2.
66 DMA unit 1 and 2 programming over. Initializing the 8259 interrupt
controller.
Table 4-12.Uncompressed Initialization Codes (Continued)
Code Description