ROCKY-3702EV Socket 370 Celeron
TM
& Pentium III
with AGP VGA & 10/100Mbps Ethernet SBC
24
enable it then the BIOS will be executed from the RAM. Each
option allows 16KB segment to be shadowed to the RAM.
4.4 Advanced Chipset Setup
This setup functions are working mostly for Chipset (Intel
440BX). These options are used to change the Chipset‘s
registers. Please carefully change any default setting ,otherwise
the system will run unstably.
Configure SDRAM Timing by SPD >
E
nabled
will select
predetermined optimal values of chipset parameters. When
Disabled, chipset parameters return to setup information stored
in CMOS.
SDRAM RAS# to CAS delay >
to specify the relative delay
between row and column address strobe form SDRAM.
SDRAM RAS# Precharge >
this option specifies the length of
time for Row Address Strobe form SDRAW to precharge.
SDRAM CAS# Latency >
to specify the CAS latency timing
form SDRAM DRAM.
DRAM Integrity Mode >
to choose DRAM Integrity Mode;
ECC/EC
will enable the
E
rror
C
hecking and
C
orrection DRAM
integrity mode.
