ICP CON I-7188XC Series, Руководство пользователя, Страница: 70 / 150

The definition of an I/O expansion bus is given as follows:
J1 Pin
Pin 19
Pin 20
Pin 1
Pin 2
J1 pin definition and description:
J2 Pin Pin 19
Pin 20
Pin 1
Pin 2
No Name Description
1 GND PCB ground
2 GND PCB ground
3 CLOCKA CPU synchronous clock output
4 ARDY Asynchronous ready input (level sensitive, OPEN=ready)
5 INT0 Channel 0 interrupt request input (asynchronous, active high)
6 INT1 Channel 1 interrupt request input (asynchronous, active high)
7 VCC PCB power supply
8 RESET Power-up reset pulse (active high)
9 GND PCB ground
10 /RESET Power up reset pulse (active low)
11 TO_0 CPU Timer output 0(can be used as a programmable D/I/O)
12 TO_1 CPU Timer output 1(can be used as a programmable D/I/O)
13 TI_0 CPU Timer input 0 (can be used as a programmable D/I/O)
14 TI_1 CPU Timer input 1 (can be used as a programmable D/I/O)
15 SCLK Common serial clock output for 7188 series modules
16 DIO9 Programmable D/I/O bit
17 DIO4 Programmable D/I/O bit
18 DIO14 Programmable D/I/O bit
19 VCC CPU power supply
20 VCC CPU power supply
I-7188XC Series User’s Manual(Ver.1.0, Apr/2007,7MH-21-10) ---
70