
4 - 4
VCC
SW5V
SW5V
74
45
“PS5C”
VCO5
T5V
R5V
LOGIC UNIT
RF UNIT
• POWER SUPPLY CIRCUITS
RF UNIT
PS5V
Logical circuits;
CPU (IC8),
Reset IC (IC21),
EEPROM (IC7), etc
VCO and BUFFER amp.;
VCO (Q76, D59−D61),
Buffers (Q5, Q74, Q75), etc.
COMMON;
PLL IC (IC19),
D/A converter, etc.
TRNSMITTER CIRCUITS;
Pre-driver (Q3), etc.
RECEIVER CIRCUITS;
IF IC (IC2), 1st mixer (Q13),
1st IF amp. (Q14), etc.
FOR POWER SAVE MODE;
APC amp. (IC26),
tone amp. (IC26), etc.
CPU
(IC8)
“R5C”
“T5C”
“PSVCO”
Q11
Q4, D6, D7
Q9, Q10, Q18, Q19
IC12
Q22
Q21
Q54
73
58
69
VCO5
Regulator
SW5V
Regulator
CPU5
Regulator
Charger
circuit
T5V
Regulator
R5V
Regulator
PS5V
Regulator
“PWRON”
From the
battery
From the
ext. DC power
Voltage line
Control signal
4-4 POWER SUPPLY CIRCUITS
DC voltage from the battery or external DC power supply is routed to whole circuit of the transciever via regulators.
4-5 CPU PORT ALLOCATION
Pin
No.
Pin
Name
Description
I/O
1
TONE
Tone signals (DTMF/BEEP/1750Hz).
OUT
2
CTCSS
Tone signals (CTCSS/DTCSS).
OUT
4
AFON
AF power amplifi er control signal.
"High"=While the AF poer amp. is activated.
OUT
5
RMUTE
AF line mute signal to the AF switch.
"Low"=While muting.
OUT
9
CSHIFT
Clock frequency shift control signal to the
clock oscillator.
OUT
10
RESET
CPU reset signal.
"Low"=CPU reset.
IN
16
PWRSW
[PWR] Key.
"Low"=When the key is pushed.
IN
17
NOIS
"NOIS" signal.
IN
18
DCC
Eexternal power supply connection detect.
"Low"=Powered by external DC.
IN
19
HOUT
Power supply detect.
"Low"=Powered by battery.
IN
20
PTT
Input signal from [PTT] key.
"High"=While the key is pushed.
IN
21−24
KR0−KR3
Input signal from Key pads.
"Low"=When the key is pushed.
IN
25
LEDC
Backlight control signal to the LED driver.
OUT
33
DISDA
Serial data to the LCD driver.
IN
34
DISST
Chip-enable signal to the LCD driver.
IN
35
DISCK
Serial clock signal to the LCD driver.
IN
36
DISEN
Disable signal to the LCD driver.
IN
40
DICK
Pulse signal from [CONTROL DIAL].
IN
41
DIUD
IN
42
MONISW
[MONI] key.
"Low"=When the key is pushed.
IN
45
PWRON
Control signal to the power regulator.
OUT
48−52
KS0−KS4
Input signal from Key pads.
"Low"=When the key is pushed.
OUT
53
MICS
AF fi lter switching signal.
OUT
54
MMUTE
MIC line mute signal to the AF switch.
"low"=While muting.
OUT
55
DADATA
Data signal to the D/A converter.
OUT
56
DACK
Clock signal to the D/A converter.
OUT
Pin
No.
Pin
Name
Description
I/O
57
DASTB
Strobe signal to the D/A converter.
OUT
58
T5C
T5 line control signal to the T5 regulator.
"Low"=While transmitting.
OUT
59
TXC
Transmit mute signal to the TX switch.
"Low"=While TX muting.
OUT
61
UNLK
PLL unlock signal.
"Low"=PLL is unlocked.
IN
63
PLLSTB
Strobe signal to the PLL IC.
OUT
64
PLPS
PLL IC power save mode switching signal.
"Low"=While in power save mode.
OUT
65
PLLDATA Data signal to the PLL IC.
OUT
66
PLLCK
Clock signal to the PLL IC.
OUT
68
PLLSW
PLL loop fi lter characteristic toggle signal.
"High"=While the PLL is kicked-up.
OUT
69
PSVCO
VCO regulator control signal.
"Low"=While Vco is activated."
OUT
70
CHGIH
Charger circuit (High) control signal.
"High"=While charging.
OUT
71
CHGC
Charger circuit control signal.
"High"=While charging.
OUT
74
PS5C
Power save line control signal to the PS5V
regulator.
"Low"=While power save mode.
OUT
77
SI
External MIC key (A/D) input.
"High"=While the key is pushed.
IN
78
OPSD
Data signal to the attached optional unit.
OUT
79
ESCK
Clock signal to the EEPROM.
OUT
81
OPV1
Scramble unit detection signal.
"Low"=DTMF unit is attached.
IN
82
OPV2
Optional unit attachement detection signal.
"Low"=DTMF unit is attached.
IN
83
OPV3
DTMF unit detection signal.
"Low"=DTMF unit is attached.
IN
87
DCIN
External power supply's voltage detection.
IN
88
LVIN
Lock voltage.
IN
90
SD
"SD" signal (RSSI signal).
IN
91
VIN
Remining battery voltage detection.
IN
93
CTCIN
DTCS and CTCSS signals.
IN
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