3 - 8
Pin
number
Port
name
Description
1−27
H8_A13−
H8_WAIT#
Outputs data signal to CPU2
(IC604).
28−37
DPL_BUSY
DPL_LB#
Outputs data signal to dual SRAM
(IC51).
45
TDO0
Outputs data signal to CPU2
(IC604).
47
TMS
Outputs serial data signal to CPU2
(IC604).
48
TCK
Outputs clock data signal to CPU2
(IC604).
49−58
IMS0−IMS7 Outputs serial data signal.
63
HFANTI
Outputs control signal to ANT unit.
High : ANT 1 is selected.
Low : ANT 2 is selected.
64
HFANTO
Outputs control signal to ANT unit.
High : V/U ANT 1 is selected.
Low : V/U ANT 2 is selected.
65
BSTB
Outputs strobe signal to BPF unit.
66
RASTB
Outputs strobe signal to RF-A unit.
67
RBSTB
Outputs strobe signal to RF-B unit.
68
DSON
Outputs serial data to DSP IC
(MAIN UNIT; IC1005).
70
DSAP
Outputs serial data to DSP IC
(MAIN UNIT; IC1005).
71
DSTB
Outputs strobe signal to DSP IC
(MAIN UNIT; IC1005).
81
APIRQ
Outputs IRQ signal to unit.
82
APSI
Input por t for serial data from
attached UT-122.
85
APCK
Outputs clock signal to attached
UT-122.
86
APSO
Outputs serial data to attached
UT-122.
87
APSTB
Outputs strobe signal to attached
UT-122.
89
APBUSY
I n p u t p o r t f o r “ B U S Y ” f r o m
attached UT-122.
90−92
APAFSL1−
APAFSL3
Output AF line control signal to
the AF circuits.
94
DRESL
Input port for reset signal.
99
PLD_RES
Input port for reset signal.
CPLD (LOGIC/LOGIC-A UNIT; IC605)