3 - 11
3-7-3 MAIN-CPU PORT ALLOCATIONS
(MAIN-A UNIT; IC3501)
6–9,
11–18,
20–26
29
30
31
32
34
37
40–43,
45–52,
54–57
59
61
63
64
66
69
70
71
72
73
74
75
76
77
Address signal output ports for the
LCD controller (IC3551).
Input port for the [KEY] jack.
Low : During key down
Input port for the RTTY keying.
Power supply detection input port for
the DSP-A board.
Input port for data signal from DSP-A
board.
Input port for the [POWER] switch.
Low :
When the [POWER] is pushed.
Outputs CW/RTTY keying.
Data bus lines for the LCD controller
(IC3551) and I/O expander (IC3652–
IC3654).
Outputs the CI-V signal.
Input port for the CI-V signal.
Outputs clock signal.
Outputs data signal.
Input port for the [XVERT] detection
signal.
Input port for transmit control signal
from the antenna tuner CPU (CTRL-A
board; IC5).
Outputs R8V regulator (Q601, Q602,
D601) control signal.
Low : While receiving
Outputs T8V regulator (Q611, Q612,
D611) control signal.
Low : While transmitting
Outputs antenna tuner start signal.
Outputs reset/inhibit signal to the sub-
CPU (DISPLAY board; IC401), DDS
ICs (PLL unit; IC101, IC401), antenna
tuner CPU (CTRL-A board; IC5), and
etc.
Input port for unlock signal from the
PLL unit.
Outputs strobe signals for the I/O
expander IC (PLL unit; IC1).
Outputs strobe selection signals for
the I/O expander (PLL unit; IC1).
Outputs control signal for the DDS cir-
cuits (PLL unit; IC101, IC401).
A0–A3,
A4–A11,
A12–A18
SKYS
RTKI
DPGI
DSDR
PWRK
DSKY
DB0–DB3,
DB4–DB11,
DB12–DB15
CTXD
CRXD
MCK
MDAT
TRVI
IKEY
RXS
TXS
ISTA
DRES
UNLC
PSTB
PSEL
CON2
Pin
Port
Description
number
name
78
79
85, 86
96
97
98
101
105
106
107
108
109
110
111
112
115
116
Outputs data signal for the DDS cir-
cuits (PLL unit; IC101, IC401).
Outputs clock signal for the DDS cir-
cuits (PLL unit, IC101, IC401).
Input ports for the CPU system clock
oscillator (X3501; 19.6608 MHz).
Outputs reset/inhibit signal for the
LCD controller (IC3551), I/O expander
(IC3652–IC3654), and etc.
Outputs data signal for the sub-CPU
(DISPLAY board; IC401).
Input port for data signal from the
sub-CPU (DISPLAY board; IC401).
Outputs [TIMER] indicator control sig-
nal.
High : When the timer function is ON
Input port for the scope signal.
A/D input port for the VOX gain.
A/D input port for the anti-VOX level.
A/D input port via the analog switch
(IC3631) for the SML signal from the
S-meter amplifier circuit (IC101a),
and ALCL signal from the ALC meter
amplifier circuit (IC551a).
A/D input port via the analog switch
(IC3631) for the NSQO signal from
the level conveter (DSP-A board;
IC2063), for noise squelch opera-
tion, and FORL signal from the power
meter amplifier circuit (IC571a).
A/D input port from the analog switch
(IC3631) for the FNTL signal from
the low-pass filter (DSP-A board;
IC2472a), for tone squelch operation,
and REFL signal from the SWR meter
amplifier circuit (IC571b).
Outputs CW side-tone signals.
Outputs beep audio signals.
Input port for connected microphone’s
PTT switch and SEND signal from the
ACC jacks.
High :
While PTT switch is pushed or
activated from an external unit.
Outputs control signal for the power
switching relay (PA unit; RL1) .
High : During power ON
CON1
(PDAT)
CON0
(PCK)
XTAL,
EXTAL
LRES
LTXD
LRXD
TMD
SCPL
VOXL
AVXL
ASO0
ASO1
ASO2
STON
BEEP
SENI
PWRS
Pin
Port
Description
number
name