Icom i703, Руководство по обслуживанию

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3-1-9 AGC CIRCUIT (MAIN UNIT)
The AGC (Automatic Gain Control) circuit reduces IF ampli-
fier gain to keep the audio output at a constant level. The
receiver gain is determined by the voltage on the AGC line
(Q2503).
The 2nd IF signal from the buffer amplifier (Q1251) is detect-
ed at the AGC detector (D2501) and applied to the AGC
amplifier (Q2501). Q2501 sets the receiver gain with the
[RF/SQL] control via the “RFGV” signal line.
When receiving strong signals, the detected voltage increas-
es and the AGC voltage decreases via the DC amplifier
(Q2503). The AGC voltage is used for IF amplifiers (Q881,
Q1401) to attenuate the received signals.
When AGC slow is selected, C2505 and R2506 are con-
nected in parallel to obtain appropriate AGC characteristics.
The AGC signal is also applied to the meter amplifier
(IC2401), and is then applied to the main CPU (IC5901) to
use the S-meter as “SML” signal.
3-1-10 S-METER CIRCUIT (MAIN UNIT)
The S-meter circuit indicates the relative received signal
strength while receiving by utilizing the AGC voltage which
changes depending on the received signal strength.
The output voltage of the meter amplifier (IC2401, pin 7) is
applied to the main CPU (IC5901) as an S-meter signal via
the A/D converter (IC5601) as the “SML” signal.
The S-meter signal from the main CPU (IC5901) is applied
to the sub CPU, and is then displayed on the S-meter read-
out.
3-1-11 SQUELCH CIRCUIT (MAIN UNIT)
The squelch circuit mutes audio output when the S-meter
signal is lower than the [RF/SQL] control setting level.
In SSB/CW/RTTY modes, the S-meter signal is applied to
the main CPU (IC5901, pin 36) and is compared with the
threshold level set by the [RF/SQL] control. The [RF/SQL]
setting is picked up at the sub CPU (DISPLAY board; IC6,
pin 97). The main CPU compares the S-meter signal and
[RF/SQL] setting, and controls the AF selector switch
(IC2301) to cut out AF signals.
In FM mode, a portion of the AF signals from the FM IF IC
(IC2101, pin 9) are applied to the active filter section (pin 8)
where noise components above 20 kHz are amplified. The
signals are rectified at the noise detector section and then
output from pin 14. The noise squelch signal from pin 14 is
applied to the main CPU (IC5901, pin 31) via the A/D con-
verter (IC5601, pin 11) as the “NSQL” signal. The CPU then
controls the AF selector switch (IC2301).
3-1-12 DEMODULATOR CIRCUITS (MAIN UNIT)
(1) SSB/CW/RTTY modes
The 2nd IF signals from the buffer amplifier (Q1251) are
mixed with the BFO signal from the PLL circuit at the SSB
detector (IC1901, pins 3, 6). The detected AF signals from
IC1901 (pin 1) are applied to the AF selector switch (IC2301,
pin 12) via the “SSAF” signal.
(2) AM mode
The 2nd IF signals from the buffer amplifier (Q1251) are
detected at the AM detector (D2001). The detected AF sig-
nal is applied to the AF selector switch (IC2301, pin 12) via
the “AMAF” signal.
(3) FM/FM NARROW modes
The 2nd IF signals from the buffer amplifier (Q1251) are
applied to the FM IF IC (IC2101, pin 5) where the IF signals
are converted into 455 kHz IF signals. The signals are
applied to the quadrature detector section. X2101 is used for
quadrature detector. The detected AF signals from pin 9
pass through the de-emphasis circuit (IC2401), and are then
applied to the AF selector switch (IC2301, pin 14) via the
“FMAF” signal.
RFGV
(RF gain control)
Q2501
8 V
D2501
C2501
C2502
2nd IF
signal
C2504
R2505
Q2502
C2505
R2506
Q2503
C2503
R2504
R2503
D2502 R2507
R2508
R2502
Amp.
IC2401
SML
AGC det.
S-meter signal
• AGC CIRCUIT