Hardware Installation 2-9
If the Refresh cycle does not active before WDT period cycle, the on board WDT
architecture will issue a Reset or NMI cycle to the system.
The Watch -Dog Timer is controlled by two I/O ports.
443H
I/O Read
The Enable cycle.
443H
I/O Read
The Refresh cycle.
043H
I/O Read
The Disable cycle.
The following sample programs showing how to Enable, Disable and Refresh
the Watch -dog timer:
WDT_EN_RF
EQU
0443H
WDT_DIS
EQU
0043H
WT_Enable
PUSH
AX
; keep AX DX
PUSH
DX
MOV
DX,WDT_EN_RF ; enable the watch-dog timer
IN
AL,DX
POP
DX
; get back AX, DX
POP
AX
RET
WT_Rresh
PUSH
AX
; keep AX, DX
PUSH
DX
MOV
DX,WDT_ET_RF ; refresh the watch-dog timer
IN
AL,DX
POP
DX
; get back AX, DX
POP
AX
RET
WT_DISABLE
PUSH
AX
PUSH
DX
MOV
DX,WDT_DIS
; disable the watch-dog timer
IN
AL,DX
POP
DX
; get back AX, DX
POP
AX
RET
2.13 PCI VGA Controller (NuPRO-630 Only)
The NuPRO-630 has built-in a S3 86C375 VGA Controller with on-board 2 MB
memory, support resolutions up to 1280 x 1024 256 colors, reserved internal
10-pin VGA-CRT header connector.
To get more VGA drivers information, please refer to the S3’s internet addre ss:
WWW.S3.COM