IBM DTNA-22160 - Travelstar 2.1 GB Hard Drive, Технические характеристики

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450msec for drive 1 to assert -DASP. If drive 1 is not present, drive 0 may assert -DASP to
drive a L E D indicator.
-DASP shall be negated following acceptance of the first valid command by drive 1 or after
31 seconds, whichever comes first.
Anytime after negation of -DASP, either drive may assert -DASP to indicate that a drive is
active.
-PDIAG This signal shall be asserted by drive 1 to indicate to drive 0 that it has completed diagnos-
tics. This line is pulled-up to 5 Volt in the H D D through a 10Kohm resistor.
Following a Power On Reset, software reset or -HRESET, drive 1 shall negate -PDIAG
within 1 msec (to indicate to drive 0 that it is busy).
Drive 1 shall then assert -PDIAG
within 30 seconds to indicate that it is no longer busy, and is able to provide status. After
the assertion of -PDIAG, drive 1 may be unable to accept commands until it has finished its
reset procedure and is ready ( D R D Y = 1 ) .
Following the receipt of a valid Execute Drive Diagnostics command, drive 1 shall negate
-PDIAG within 1 msec to indicate to drive 0 that it is busy and has not yet passed its drive
diagnostics. If drive 1 is present then drive 0 shall wait for up to 5 seconds from the receipt
of a valid Execute Drive Diagnostics command for drive 1 to assert -PDIAG.
Drive 1
should clear BSY before asserting -PDIAG, as -PDIAG is used to indicate that drive 1 has
passed its diagnostics and is ready to post status.
If -DASP was not asserted by drive 1 during reset initialization, drive 0 shall post its own
status immediately after it completes diagnostics, and clear the drive 1 Status register to 00h.
Drive 0 may be unable to accept commands until it has finished its reset procedure and is
ready ( D R D Y = 1 ) .
KEY Pin position 20 has no connection pin. It is recommended to key or blank the respective
position of the cable connector in order to avoid wrong insertion by mistake.
5V Power There are two input pins for + 5 V power supply, " + 5 V LOGIC" and " + 5 V MOTOR".
" + 5 V LOGIC" is connected to the internal logic circuits and " + 5 V M OT O R " is connected
to the spindle motor and motor driver.
It is possible to turn on and off " + 5 V LOGIC" by an external switch circuit to reduce
power consumption to the least possible. In this mode, a voltage drop out due to the motor
spin up current can be reduced by connecting " + 5 V M O T OR " line into the system power
source directly.
If the above power management is used, all signal lines that will be electrically active in the
host system while the H D D is disconnected from power line shall be isolated by Three-State
line drivers. Internal leakage through ESD protection circuit may pull down L P U L (Least
Positive U p Level) of logic signal below the spec.
Use both lines in parallel, for regular H D D applications.
-DMACK This signal shall be used by the host in response to D M A R Q to either acknowledge that
data has been accepted, or that data is available. This signal is internally pulled up to 5 volts
through 15K resistor(tolerance of the resistor value is -50% to + 1 0 0 % ) .
DMARQ This signal, used for D M A data transfers between host and drive, shall be asserted by the
drive when it is ready to transfer data to or from the host. The direction of data transfer is
controlled by -HIOR and -HIOW. This signal is used on a handshake manner with
-DMACK. This signal is a 3-state line with 24mA sink capability and internally pulled-down
to G N D through 10KOhm resistor.
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O E M Specifications of DTNA-2xxxx 2.5 inch H D D