IBM CPC700, Руководство пользователя

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CPC700 User’s Manual—Preliminary 9-1
Chapter 9. General Purpose Timers
9.1 Introduction
The General Purpose Timer (GPT) provides a separate time base counter and system timers for the
CPC700. Five capture timers and five compare timers are implemented in the GPT macro. The following
sections include a list of major features, an overview, supported configurability, and register descriptions of
the General Purpose Timer core.
Features of the General Purpose Timer core include:
• 32 bit time base
- Time base counter is updated once every CPC700 SYS_CLOCK
• Memory mapped registers provide direct control of all GPT functions
• Five capture event timers and five compare timers
- Each capable of interrupting the processor when properly enabled
9.1.1 GPT Registers
All GPT registers are memory mapped and accessed via load/store instructions using the addresses
shown in Table 96.
Table 96. GPT Registers
Base Address Register Register Name
Access
Mode Width
(bits)
FF65_0000 GPTTBC GPT Time Base Counter R/W 32
FF65_0004 GPTCE GPT Capture Enable R/W 32
FF65_0008 GPTEC GPT Edge-Detection Control R/W 32
FF65_000C GPTSC GPT Synchronization Control R/W 32
FF65_0010 (Reserved) R/W 32
FF65_0014 (Reserved) R/W 32
FF65_0018 GPTIM GPT Interrupt Mask R/W 32
FF65_001C GPTISS GPT Interrupt Status (Set bits if write 1) R/W 32
FF65_0020 GPTISC GPT Interrupt Status (Clear bits if write 1) R/W 32
FF65_0024 GPTIE GPT Interrupt Enable R/W 32
FF65_0028 -
FF65_003C (Reserved)
FF65_0040 GPTCAPT0 GPT Capture Timer 0 Read 32
FF65_0044 GPTCAPT1 GPT Capture Timer 1 Read 32
FF65_0048 GPTCAPT2 GPT Capture Timer 2 Read 32
FF65_004C GPTCAPT3 GPT Capture Timer 3 Read 32
FF65_0050 GPTCAPT4 GPT Capture Timer 4 Read 32
FF65_0054 -
FF65_007C (Reserved)
FF65_0080 GPTCOMP0 GPT Compare Timer 0 R/W 32
FF65_0084 GPTCOMP1 GPT Compare Timer 1 R/W 32