IBM 6275 - PC 300 GL, Техническое руководство

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Appendix B. System Address Maps
PCI Configuration Space Map
Figure 50 (Page 2 of 2). DMA I/O Address Map
Address (Hex) Description Bits Byte Pointer
00C8 Channel 6, Memory Address register 00–15 Yes
00CA Channel 6, Transfer Count register 00–15 Yes
00CC Channel 7, Memory Address register 00–15 Yes
00CE Channel 7, Transfer Count register 00–15 Yes
00D0 Channels 4–7, Read Status/Write Command register 00–07
00D2 Channels 4–7, Write Request register 00–02
00D4 Channels 4–7, Write Single Mask register bit 00–02
00D6 Channels 4–7, Mode register (write) 00–07
00D8 Channels 4–7, Clear byte pointer (write) N/A
00DA Channels 4–7, Master clear (write)/temp (read) 00–07
00DC Channels 4–7, Clear Mask register (write) 00–03
00DE Channels 4–7, Write All Mask register bits 00–03
00DF Channels 5–7, 8- or 16-bit mode select 00–07
Bus Number (hex) Device Number
(hex) Function Number
(hex) Description
00 00 00 Intel 84440BX (Host bridge)
00 01 00 Intel 84440BX
00 02 00 Intel 82371AB PCI/ISA bus
00 02 01 Intel 82371AB IDE bus master
00 02 02 Intel 82371AB USB
00 02 03 Intel 82371AB power management
01 00 00 S3 TRIO AGP controller
00 03 00 Ethernet controller
3 Upper byte of memory address register.
Appendix B. System Address Maps
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