HYT RPU416A, Руководство пользователя

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5
RPU416A Circuit Description
signal. The second IF signal is then fed through a 450kHz ceramic filter (CF200) to further eliminate
unwanted signals before it is amplified and FM detected in IC200.
4)
AF amplifier
The recovered AF signal obtained from IC200 is amplified by IC300 (1/4), filtered by the IC300 low-pass
filter (2/4) and IC300 high-pass filter (3/4) and (4/4), and de-emphasized by R303 and C306. The AF
signal is then passed through a WIDE/NARROW switch (Q303). The processed AF signal passes through
an AF volume control and is amplified to a sufficient level to drive a loud speaker by an AF power amplifier
(IC302).
5) Squelch
Part of the AF signal from the IC enters the FM IC again, and the noise component is amplified and
rectified by a filter and an amplifier to produce a DC voltage corresponding to the noise level.
The DC signal from the FM IC goes to the analog port of the microprocessor (IC403). IC403 determines
whether to output sounds from the speaker, IC403 sends a high signal to the MUTE and AFCO lines and
turns IC302 on through Q302, Q304, Q305, Q306 and Q307. (See Fig.3)
FM IF IC200
IF AMP DET
DET HPF
AMP
IC 300
AF AMP LPF HPF
Q302
SW
IC302
AF/PF AMP
Q307
SW
SP
Q304.Q305.Q306
SW
Q303
W/N SW
IC301
LPF
5 62 67 6
BUSY MUTE AFCO TI
IC403
MPU
Fig. 3. AF Amplifier and squelch
6) Receiving signaling
QT/DQT
300 Hz and higher audio frequencies of the output signal from IF IC are cut by a low-pass filter (IC301).
The resulting signal enters the microprocessor (IC403). IC403 determines whether the QT or DQT
matches the preset value, and controls the MUTE and AFCO and the speaker output sounds according to
the squelch results.
3. PLL frequency synthesizer
The PLL circuit generates the first local oscillator signal for reception and the RF signal for transmission.
1) PLL
The frequency step of the PLL circuit is 5 or 6.25kHz. A 12.8MHz reference oscillator signal is divided at
IC1 by a fixed counter to produce the 5 or 6.25kHz reference frequency. The voltage controlled oscillator
(VCO) output signal is buffer amplified by Q6, then divided in IC1 by a dual-module
RPU416A Circuit Description
programmable counter. The divided signal is compared in phase with the 5 or 6.25kHz reference signal in
the phase comparator in IC1. The output signal from the phase comparator is filtered through a low-pass
filter and passed to the VCO to control the oscillator frequency. (See Fig. 4 of Next Page)