Chapter 1
HP Integrity rx8640 and HP 9000 rp8440 Server Overview
Detailed Server Description
24
Figure 1-7
Socket Locations on Cell Board
Memory Subsystem
Figure 1-8 on page 25 shows a simplified view of the memory subsystem. It consists of four independent
access paths, each path having its own address bus, control bus, data bus, and DIMMs. Address and control
signals are fanned out through register ports to the synchronous dynamic random access memory (SDRAM)
on the DIMMs.
Table 1-1
Cell Board CPU Module Load Order
Number
of CPU
Modules
Installed
Socket 2
Socket 3
Socket 1
Socket 0
1
Empty slot
Empty slot
Empty slot
CPU installed
2
CPU installed
Empty slot
Empty slot
CPU installed
3
CPU installed
Empty slot
CPU installed
CPU installed
4
CPU installed
CPU installed
CPU installed
CPU installed
Socket 2
Socket 3
Socket 1
Socket 0
Cell
Controller
Содержание Integrity rx8640
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