Holtek HT48R05A-1, Руководство пользователя, Страница: 34 / 125

An external clock source is used when the timer is in the event counting mode, the clock source
being provided on pin-shared pin PC1/TMR. Depending upon the condition of the TE bit, each
high to low, or low to high transition on the PC1/TMR pin will increment the counter by one.
Timer Register
-
TMR
The TMR register is an 8-bit special function register location within the special purpose Data
Memory where the actual timer value is stored. The value in the timer registers increases by one
each time an internal clock pulse is received or an external transition occurs on the PC1/TMR pin.
The timer will count from the initial value loaded by the preload register to the full count value of
FFH at which point the timer overflows and an internal interrupt signal generated. The timer value
will then be reset with the initial preload register value and continue counting. For a maximum full
range count of 00H to FFH the preload register must first be cleared to 00H. It should be noted that
after power-on the preload register will be in an unknown condition. Note that if the Timer/Event
Counter is in the OFF condition and data is written to its preload register, this data will be immedi-
ately written into the actual counter. However, if the counter is enabled and counting, any new data
written into the preload register during this period will remain in the preload register and will only
be written into the actual counter the next time an overflow occurs. Note also that when the TMR
register is read, the timer clock will be blocked to avoid errors, however as this may result in certain
timing errors, programmers must take this into account.
Timer Control Register
-
TMRC
The flexible features of the Holtek microcontroller Timer/Event Counters enable them to operate
in three different modes, the options of which are determined by the contents of the timer control
register TMRC. Together with the TMR register, these two registers control the full operation of the
Timer/Event Counters. Before the timer can be used, it is essential that the TMRC register is fully
programmed with the right data to ensure its correct operation, a process that is normally carried
out during program initialization.
To choose which of the three modes the timer is to operate in, the timer mode, the event counting
mode or the pulse width measurement mode, bits TM0 and TM1 must be set to the required logic
levels. The timer-on bit TON or bit 4 of the TMRC register provides the basic on/off control of the
timer, setting the bit high allows the counter to run, clearing the bit stops the counter. Bits 0~2 of
the TMRC register determine the division ratio of the input clock prescaler. The prescaler bit set-
tings have no effect if an external clock source is used. If the timer is in the event count or pulse
width measurement mode the active transition edge level type is selected by the logic level of the
TE or bit 3 of the TMRC register.
Chapter 1 Hardware Structure
27
P C 1 / T M R
T E
T i m e r / E v e n t C o u n t e r
M o d e C o n t r o l
T O N
P r e l o a d R e g i s t e r
T i m e r / E v e n t C o u n t e r
D a t a B u s
R e l o a d
O v e r f l o w
t o I n t e r r u p t
¸ 2
B Z
B Z
8 - S t a g e P r e s c a l e r f
S Y S
P S C 2 ~ P S C 0
( 1 / 2 ~ 1 / 2 5 6 )
8 - B i t T i m e r / E v e n t C o u n t e r
T M 1 T M 0
8-bit Timer/Event Counter Structure