HANNspree 1E03-37GT, Руководство по обслуживанию

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5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
B
BAI1
BR
A
I3
BG
A
I1
BSOG1 BRM
U
X
IN
0
BRM
U
X
IN
2
BBM
UX
IN
0
BR
A
I1
B
BAI2
BX
OUT
BXIN BREX
T
BG
A
I3
BSM
UX
IN
0
BRM
U
X
IN
1
BBM
UX
IN
1
BGM
UX
IN
1
BSM
UX
IN
1
TX
E
0
p
TX
E
2
p
TXECm TX
E
2
m
TX
E
1
m
TX
E
0
m
TX
E
1
p
TX
E
C
p
TX
E
4
m
TX
O
0
m
TX
E
3
m
TX
O
1
m
TX
O
0
p
TX
O
1
p
TX
E
4
p
TX
E
3
p
TX
O
3
m
TX
O
4
m
TX
O
3
p
TXO
C
p
TX
O
2
m
TX
O
2
p
TX
O
4
p
TXOCm RP
IA
P
A
NEL
V
CC
P
A
NEL
V
CC
P
A
NEL
V
CC
P
A
NEL
V
CC
P
A
NEL
V
CC
BGM
UX
IN
0
P0AGR
N
9
P0ABLU3 P0ARE
D
3
P0AGR
N
2
P0ARE
D
7
P0AGR
N
3
P0ARE
D
6
P0ARE
D
9
P0ABLU4 P0ABLU9 P0ABLU2 P0ARE
D
5
P0ARE
D
8
BHS
P0ABLU6 P0AGR
N
5
P0AGR
N
8
P0ABLU5 P0ARE
D
4
P0ABLU7 P0AGR
N
4
P0AGR
N
7
P0ARE
D
2
P0ABLU8 P0AGR
N
6
TXO
4
p
1
TXO
4
m
1
TX
O
1
m
TXO
3
m
1
TXO
1
m
1
TX
O
4
m
T
X
E1p1
TX
O
3
p
TX
E
0
p
TXOCm1
TXO
C
p
TXO
1
p
1
TX
E
1
m
TXE
1
m
1
TX
O
2
p
TXO
2
p
1
TXO
0
p
1
TX
O
0
m
TX
E
1
p
T
X
E0p1
TX
O
1
p
TX
O
0
p
TX
O
3
m
TXO
0
m
1
TX
O
4
p
TXO
2
m
1
TXOCm
TXO
3
p
1
TXO
C
p
1
TX
E
0
m
TXE
0
m
1
TX
O
2
m
TX
E
3
p
TX
E
3
m
TXE
4
m
1
TX
E
4
p
TX
E
4
m
T
X
E4p1
T
X
E3p1
TXE
3
m
1
TXE
2
m
1
TXECm1
TX
E
2
m
TX
E
2
p
TXE
C
p
1
TXECm
T
X
E2p1
TX
E
C
p
P
0
A
R
ED[9:2]
P[6]
P0AG
R
N
[9
:2
]
P[6]
P0ABLU[9:2
]
P[6]
P0
A
C
L
K
P[6]
P
0
APEN
P[6]
P0AVS
P[6]
P0A
H
S
P[6]
YU
V
_
P
W
_PR
P[
7
]
Y
U
V_PW
_PB
P[
7
]
YU
V
_
P
W
_Y
P[
7
]
PCVS
P[
4
]
PCR
E
D
P[
4
]
PCG
R
N
P[
4
]
PC
B
L
U
P[
4
]
S_
C
P[
5
]
P
CHS
P[
4
]
S
C
T
1_FB
P[
2
]
S
C
T
2_FB
P[
2
]
S
C
T1
_CTL
P[
2
]
S
C
T2
_CTL
P[
2
]
S_Y
P[
5
]
MUTE2
P[5]
VCC
S
W
V33
V33
P
A
NEL
V
CC
P
A
NEL
V
CC
V33
TX
E
0
m
1
TX
E
2
m
1
TX
E
1
m
1
TXECm1 TX
E
3
m
1
TXE
C
p
1
T
X
E3p1
T
X
E2p1
T
X
E0p1
T
X
E1p1
TXO
3
m
1
TXOCm1 TXO
2
m
1
TXO
1
m
1
TXO
0
m
1
TXO
C
p
1
TXO
2
p
1
TXO
1
p
1
TXO
0
p
1
TXO
3
p
1
SCT
_
RED
P
[16]
T
V
_U
2_C
VB
S
P
[16]
SCT
_
C
P
[16]
SCT
_
Y
P
[16]
SCT
_
BLUE
P
[16]
S
C
T_
G
R
EEN
P
[16]
AV_
U
2
_
C
V
B
S
P
[16]
DPM
S
P
[11]
DVBT
_I
R
Q
P[7]
DVBT
_R
S
T
P[7]
D
V
B
T
_
C
O
M
P
OSITE
P[7]
Y
U
V_DVBT
_
S
E
L
P[7]
Analog Input Port
Digital Input Port
LVDS Ouput Port
H
I(3.3V)-->NORMAL NS LVDS
L
o(GND)-->JEIDA LVDS
S
AMSUNG 32"
LVDS Output Header
R
GB SYNC
LVDS Ouput
ADD
ADD
PW106
Analog Digital INPUT,LVDS OUTPUT
R2
0
8
NC LVD
S
2
D
U
A
L O
U
T
P
U
T
_N
C
1
2
3
4
5
6
7
8
9
10
11
12
C
2
1
6
100P_
N
C
R2
1
6
0
C
2
0
9
103
TP50
Sm
all
1
C2
1
5
.1
_
N
C
C2
0
6
.1
TP55
Sm
all
1
R2
1
8
0
TP42
Sm
all
1
R
4
2
8
100
R2
2
2
0
_
N
C
R21
3
1
0
0
D
igital
Input P
ort
U1
A
IC
, PW106
IN0R0
A9
IN0R1
D10
IN0R2
B9
IN0R3
A8
IN0R4
E13
IN0R5
C9
IN0R6
E12
IN0R7
B8
IN0G0
C8
IN0G1
B7
IN0G2
E11
IN0G3
A6
IN0G4
E10
IN0G5
D8
IN0G6
E9
IN0G7
C7
IN0B0
A5
IN0B1
C6
IN0B2
B5
IN0B3
A4
IN0B4
D7
IN0B5
A3
IN0B6
D6
IN0B7
B4
IN1R0
B1
IN1R1
C2
IN1R2
E5
IN1R3
D3
IN1R4
E4
IN1R5
C1
IN1R6
D2
IN1R7
E3
IN1G0
F4
IN1G1
F3
IN1G2
E1
IN1G3
F2
IN1G4
F5
IN1G5
G3
IN1G6
F1
IN1G7
G2
IN1B0
G4
IN1B1
H3
IN1B2
H2
IN1B3
H1
IN1B4
J4
IN1B5
J3
IN1B6
H4
IN1B7
J2
IN0CLK
C3
IN0PEN
D4
IN0VBI
E6
IN0AHS
C4
IN0VS
A2
IN0CLP
A1
IN0CST
B2
IN0FLD
D5
IN0HS
B3
IN0R8
D9
IN0R9
A7
IN0G8
E8
IN0G9
B6
IN0B8
E7
IN0B9
C5
IN1R8
D1
IN1R9
E2
IN1G8
G5
IN1G9
G1
IN1B8
H5
IN1B9
J1
IN1CLK
K3
IN1PEN
K4
R2
0
2
1K
_
N
C
C
2
1
3
47n
R20
7
7
5
Y3
X
T
A
L
2
7.000
1
2
3
Q27 3904_
N
C
B
E C
TP44
Sm
all
1
R2
1
5
7
5
TP52
Sm
all
1
R
2
1
4
22K
R21
0
1
0
0
RP1
4
22
R
1
8
2 3 4
5 6 7
TP56
Sm
all
1
R2
2
3
0
_
N
C
R5
1
4
NC
R20
6
0
C2
1
9
.1
C2
2
3
.1
R2
1
7
0
C2
0
4
.1
R52
8
3
3
RP1
2
22
R
1
8
2 3 4
5 6 7
R2
0
3
1K
_
N
C
TP53
Sm
all
1
R20
4
0
C2
1
4
.1
C2
2
2
.1
TP47
Sm
all
1
R2
2
5
0
_
N
C
R20
5
7
5
C2
1
1
.1
C2 02 56P
C2
1
8
.1
R
2
2
0
100
R21
1
1
0
0
C1 96 56P
C2
2
5
.1
C20 1 561_NC
TP54
Sm
all
1
R
4
2
7
100
RP1
5
22
R
1
8
2 3 4
5 6 7
R2
2
7
0
R
2
1
9
100
L88
SBK20-121
C
2
0
5
103
C2
2
1
.1
C2
1
7
.1
C2
0
8
.1
C19 7 561_NC
R
4
2
9
100
L86
SBK20-121
LVD
S
1
LVD
S
O
U
T
P
U
T
1 3 5 7 9
11 13 15 17 19 21 23 25 27 29
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
L89
SBK20-121
D
is
p
la
y P
ort
U1
C
IC
, PW106
DR0
C23
DR1
A25
TXOCp_DR2
B24
TXOCm_DR3
B23
TXO2p_DR4
A23
TXO2m_DR5
A24
TXO3p_DR6
A21
TXO3m_DR7
B21
DG0
D19
DG1
D18
TXE3p_DG2
C20
TXE3m_DG3
C19
TXE4p_DG4
B20
TXE4m_DG5
A20
TXO0p_DG6
B19
TXO0m_DG7
A19
DB0
C17
DB1
D16
TXE0p_DB2
B17
TXE0m_DB3
A17
TXE1p_DB4
B16
TXE1m_DB5
A16
TXECp_DB6
B15
TXECm_DB7
A15
DCLKOUT
C14
DVS
C16
DHS
D15
DEN
C15
TX04p_DR8
A22
TXO4m_DR9
B22
TXO1p_DG8
B18
TXO1m_DG9
A18
TXE2p_DB8
B14
TXE2m_DB9
A14
RPIATEST
E23
R2
2
4
0
TP49
Sm
all
1
C2
2
4
.1
C1 95 56P
C1 98 56P
TP48
Sm
all
1
R2
2
6
0
_
N
C
C1 99 56P
C2
2
8
33P
R22
8
12K
An
alog
Inpu
t
Po
rt
U1
B
IC
, PW106
SMUXIN1
U3
SMUXIN2
T1
BMUXIN0
V5
BMUXIN1
V3
BMUXIN2
U1
RAI1
Y1
RAI2
AC2
GAI1
Y3
GAI2
AD1
GAI3
AF1
BAI1
AB3
BAI2
AD3
BAI3
AE4
HSYNCIN1
AC7
ADCXIN
AF5
ADCXOUT
AE6
AISO1
U4
AISO2
W1
AISO3
Y2
AISO4
AC1
PLLISO0
AD5
RMUXIN0
R5
RMUXIN1
R3
RMUXIN2
P1
GMUXIN1
T3
GMUXIN0
T5
RMUXOUT
W2
GMUXIN2
R1
SMUXIN0
U5
RAI3
AE2
SOG1
AA2
HSYNCIN0
AD6
PLLISO1
AC6
BMUXOUT
W4
AISO0
U2
VS0
AF11
VS1
AE11
ASPECT2
P5
ASPECT1
P4
ASPECT0
P2
REXT
P6
TESTCLK
AE7
FB
AD11
AFETEST1
AE1
AFETEST2
AE3
C2
0
3
.1
C2
2
7
33P
L90
SBK20-121
TP45
Sm
all
1
L87
SBK20-121
R2
2
1
1
M
TP43
Sm
all
1
C2
2
6
.1
C2
1
0
.1
L91
SBK20-121
C2
2
0
.1
RP1
1
22
R
1
8
2 3 4
5 6 7
R2
0
9
NC
TP57
Sm
all
1
C2
0
7
.1
R21
2
1
0
0
C2
1
2
.1
RP1
0
22
R
1
8
2 3 4
5 6 7
RP1
3
22
R
1
8
2 3 4
5 6 7
C2 00 56P