Haier HL26ATB, Руководство по обслуживанию, Страница: 35 / 52

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Write protect
DNI
DNI
Place anywhere in path, no need to be close to the ASIC
Since FBINTR are active low in this
design, they must have external pull-ups.
pin header p:2.54
pin header p:2.54
<Doc> 1.0
<Title>
Custom
10 25 Thursday, November 02, 2006
Title
Size Document Number Rev
Date: Sheet of
ROMSO_NFWE#
NFCE1#
ROMSCK_NFALE
NFCLE
NFIO3
NFIO2
NFIO7
NFIO5
NFIO6
NFIO0
NFIO1
NFIO4
ROMSI_NFRE#
NFRY_BY#
ROMCS_NFCE0#
NFCE1#
ROMSO_NFWE#
ROMSCK_NFALE ROMSI_NFRE#
NFCLE
NAND_WP#
NFRY_BY#
NFIO6
NFIO4
NFIO7
NFIO5
NFIO1
NFIO3
NFIO0
NFIO2
FBINTR0#
FBINTR0#
FBINTR1#
FBINTR1#
ROMCS_NFCE0#
ROMSCK_NFALE
ROMSI_NFRE#
ROMSO_NFWE#
ROMSI_NFRE#
BootROM_WP#
ROMSO_NFWE#
ROMCS_NFCE0#
SROM_Hold_PU
ROMSCK_NFALE
FAD3 19
FAD4 19
FAD5 19
FAD7 19
FAD8 19
FAD9 19
FAD10 19
FAD11 19
I2S_MUTEB#
TV_Micro_INT# 24
RTC_INT~ 17
GPIO_DVI_HOTPLUG 7
MD_ON 19
+3.3V
+3.3V +3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
R98
10K
R94
10K_DNI
R92
10K_DNI
E1J
X240
H28
J29
J30
K29
K30
L29
L30
M29
J27
J28
K27
K28
L27
L28
M27
M28
N27
M30
P29
N29
N30
P30
N28
NFIO0
NFIO1
NFIO2
NFIO3
NFIO4
NFIO5
NFIO6
NFIO7
NFIO8
NFIO9
NFIO10
NFIO11
NFIO12
NFIO13
NFIO14
NFIO15
NFCE#0
NFCE#1
NFRE#
NFWE#
NFALE
NFCLE
NFRY_BY#
R93
10K_DNI
JP10
Header_6_Pin_1X6
1
2
3
4
5
6
R388
10K
R367
10K
C162
100nF_DNI
TP80
TP75
JP11
Header_2_Pin_1X2
1
2
128Mbit NAND Flash
E10
K9F5608U0C-YCB0
13
16
17
18
19
30
31
32
36 37
9
8
7
6
44
43
42
41 29
12
VSS
CLE
ALE
WE
WP
IO1
IO2
IO3
VSS VCC
CE
RE
R/B
SE/GND
IO7
IO6
IO5
IO4 IO0
VCC
E1B
X240
G3
F2
E1
G4
F3
E2
D1
F4
E3
D2
C1
E4
D3
C2
B3
C4
D5
C7
D8
A5
B6
A4
D7
B5
H4
F1
G2
H3
AK11
C6
A3
B4
C5
D6
FAD0
FAD1
FAD2
FAD3
FAD4
FAD5
FAD6
FAD7
FAD8
FAD9
FAD10
FAD11
FAD12
FAD13
FAD14
FAD15
FCLK
FBE0
FBE1
FALE0
FALE1
FSTB
FRD
FRDY#
FINTR0
FINTR1
FINTR2
FINTR3
FINTR4
FWE
FCE#0
FCE#1
FCE#2
FCE#3
E9
M25P40-VMN6T_DNI
1
8
2
7
4
5
6
3
S
VCC
Q
HOLD
VSS
D
C
W
R97
10K_DNI
R368
10K
C163
100nF
TP11
R96
2.2K
R99
10K
R95
10K
C164
100nF