Grundig Sonoclock 32, Руководство по обслуживанию

Страница: 39 / 78

F
S
D
Q
M
1
FSDQM0
FSCLK-
V
I_
D
A
T
A
2
V
I_
D
A
T
A
1
V
I_
D
A
T
A
4
V
I_
D
A
T
A
3
V
I_
D
A
T
A
0
V
I_
D
A
T
A
7
V
I_
D
A
T
A
6
V
I_
D
A
T
A
5
FSDATA1
FSDATA2
FSDATA3
FSDATA4
FSDATA5
FSDATA6
FSDATA7
FSDATA8
FSDATA9
FSDATA10
FSDATA11
FSDATA12
FSDATA13
FSDATA14
FSDATA15
F
S
D
A
T
A
3
0
F
S
D
A
T
A
3
1
F
S
D
A
T
A
1
7
F
S
D
A
T
A
1
8
F
S
D
A
T
A
1
9
F
S
D
A
T
A
2
0
F
S
D
A
T
A
2
1
F
S
D
A
T
A
2
2
F
S
D
A
T
A
2
3
F
S
D
A
T
A
1
6
F
S
D
A
T
A
2
4
F
S
D
A
T
A
2
5
F
S
D
A
T
A
2
6
F
S
D
A
T
A
2
7
F
S
D
A
T
A
2
8
F
S
D
A
T
A
2
9
FSDATA0
F
S
D
Q
S
3
F
S
D
Q
S
2
FSDQS0
FSDQS1
FSADDR10
FSADDR9
FSADDR8
FSADDR7
FSADDR6
FSADDR5
FSADDR4
FSADDR3
FSADDR2
FSADDR1
FSADDR0
FSCLK+
FSVREF
FSCKE
FSADDR0
FSADDR1
FSADDR2
FSADDR3
FSADDR4
FSADDR5
FSADDR6
FSADDR7
FSADDR8
FSADDR9
FSADDR10
FSADDR11
FSDATA0
FSDATA1
FSDATA2
FSDATA3
FSDATA4
FSDATA5
FSDATA6
FSDATA7
FSVREF
FSDATA8
FSDATA9
FSDATA10
FSDATA11
FSDATA12
FSDATA13
FSDATA14
FSDATA15
FSDATA16
FSDATA17
FSDATA18
FSDATA19
FSDATA20
FSDATA21
FSBKSEL0
FSBKSEL1
FSCLK-
FSCLK+
FSDATA22
FSCKE
FSDATA23
/FSRAS
FSDATA24
/FSCAS
FSDATA25
/FSWE
FSDATA26
FSDATA27
FSDATA28
FSDATA29
FSDATA30
FSDATA31
FSDQM0
FSDQM1
FSADDR11
A
D
C
-B
7
A
D
C
-B
2
A
D
C
-B
6
A
D
C
-B
5
A
D
C
-B
1
A
D
C
-B
0
A
D
C
-B
3
A
D
C
-B
4
R793 22
C408
0.1uF
C399
0.1uF
1 3 5 7
8 6 4 2
R
A
3
3
2
2
2
1 3 5 7
8 6 4 2
R
A
3
2
4
2
2
C405
0.1uF
R789 22
C563
1uF
R538 10K
R726 100
1 3 5 7
8 6 4 2
R
A
3
2
2
2
2
C390
0.1uF
R799 22
R724 4.7K
C397
0.1uF
R803
1K/1%
R728
1K
C402
0.1uF
C384
0.1uF
R792 22
R739 0
R535 10K
R783 22
C407
0.1uF
R738 0
C392
0.1uF C413
0.1uF
R784 22
C406
0.1uF
R736
0
R471
*
C411
0.1uF
C414
0.1uF
R795 22
R787 22
R536
10K
C388
0.1uF
C684
0.047uF
C412
0.1uF
C404
0.1uF
R532
10K
R794 22
R798 22
1 3 5 7
8 6 4 2
R
A
3
2
3
2
2
C564
1uF
C401
0.1uF
C729
0.1uF
C685
0.047uF
R537 10K
R796 22
1
3
5
7
8
6
4
2
RA325 22
R800 33
1
3
5
7
8
6
4
2
RA328 22
1
2
Y301
14.318MHZ
C409
0.1uF
1 3 5 7
8 6 4 2
R
A
3
3
0
2
2
C573
33pF
R790 22
R802
1K/1%
1 3 5 7
8 6 4 2
R
A
3
3
3
2
2
1
3
5
7
8
6
4
2
RA327
22
C418
0.1uF
R539 10K
R384 100
R
7
8
6
2
2
R737 0
C396
0.1uF
R791 22
C572
33pF
T317
BC848B
R
7
8
5
2
2
C424
0.1uF
C422
0.1uF
C403
0.1uF
C400
0.1uF
T318
BC848B
C393
0.1uF
T316
KSC1623
R725 4.7K
1 3 5 7
8 6 4 2
R
A
3
3
1
2
2
C416
0.1uF
C385
0.1uF
R782 390
R449 100
C386
0.1uF
R534 10K
C389
0.1uF
R661100
R533
10K
C686
0.047uF
R788 22
GND1
1
GND2
2
DVI _R+
3
DVI _R-
4
GND6
5
DVI _G+
6
DVI _G-
7
AVDD_DVI 0
8
DVI _B+
9
DVI _B-
10
GND7
11
DVI _CK+
12
DVI _CK-
13
AVDD_DVI 1
14
REXT
15
AVDD_PLL0
16
GND8
17
DDCD_DA
18
DDCD_CK
19
GND9
20
AVDD_ADC0
21
HSYNC1
22
VSYNC1
23
BIN1P
24
BIN1M
25
SOGIN1
26
GIN1P
27
GIN1M
28
RIN1P
29
RIN1M
30
BIN0M
31
BIN0P
32
GIN0M
33
GIN0P
34
SOGIN0
35
RIN0M
36
RIN0P
37
AVDD_ADC1
38
GND10
39
HSYNC0
40
VSYNC0
41
RMID
42
REFP
43
REFM
44
GND11
45
GND12
46
VDDP1
47
VI _DATA[16]
48
VI _DATA[17]
49
VI _DATA[18]
50
VI _DATA[19]
51
VI _DATA[20]
52
VI _DATA[21]
53
VI _DATA[22]
54
VI _DATA[23]
55
VI _DATA[8]
56
VI _DATA[9]
57
VI _DATA[10]
58
VI _DATA[11]
59
VI _DATA[12]
60
VI _DATA[13]
61
VDDC2
62
GND13
63
VI _DATA[14]
64
V
I_
D
A
T
A
[1
5
]
6
5
D
H
S
Y
N
C
6
6
D
E
6
7
V
I_
C
K
A
6
8
V
I_
D
A
T
A
[0
]
6
9
V
I_
D
A
T
A
[1
]
7
0
V
I_
D
A
T
A
[2
]
7
1
V
I_
D
A
T
A
[3
]
7
2
V
I_
D
A
T
A
[4
]
7
3
V
I_
D
A
T
A
[5
]
7
4
V
I_
D
A
T
A
[6
]
7
5
V
I_
D
A
T
A
[7
]
7
6
V
D
D
C
0
7
7
G
N
D
0
7
8
G
N
D
2
8
7
9
V
D
D
P
0
8
0
H
W
R
E
S
E
T
8
1
IN
T
8
2
A
L
E
8
3
R
D
Z
8
4
W
R
Z
8
5
D
B
U
S
[0
]
8
6
D
B
U
S
[1
]
8
7
D
B
U
S
[2
]
8
8
D
B
U
S
[3
]
8
9
D
B
U
S
[4
]
9
0
D
B
U
S
[5
]
9
1
D
B
U
S
[6
]
9
2
D
B
U
S
[7
]
9
3
D
D
C
R
_
C
K
9
4
D
V
S
Y
N
C
9
5
F
IE
L
D
9
6
D
D
C
R
_
D
A
9
7
P
W
M
2
9
8
V
D
D
C
1
9
9
G
N
D
2
9
1
0
0
D
Q
S
[3
]
1
0
1
M
D
A
T
A
[3
1
]
1
0
2
M
D
A
T
A
[3
0
]
1
0
3
M
D
A
T
A
[2
9
]
1
0
4
M
D
A
T
A
[2
8
]
1
0
5
V
D
D
M
0
1
0
6
G
N
D
3
1
0
7
M
D
A
T
A
[2
7
]
1
0
8
M
D
A
T
A
[2
6
]
1
0
9
M
D
A
T
A
[2
5
]
1
1
0
M
D
A
T
A
[2
4
]
1
1
1
M
D
A
T
A
[2
3
]
1
1
2
M
D
A
T
A
[2
2
]
1
1
3
M
D
A
T
A
[2
1
]
1
1
4
M
D
A
T
A
[2
0
]
1
1
5
M
D
A
T
A
[1
9
]
1
1
6
M
D
A
T
A
[1
8
]
1
1
7
M
D
A
T
A
[1
7
]
1
1
8
M
D
A
T
A
[1
6
]
1
1
9
D
Q
S
[2
]
1
2
0
D
Q
M
[1
]
1
2
1
V
D
D
M
1
1
2
2
G
N
D
4
1
2
3
M
V
R
E
F
1
2
4
M
C
L
K
E
1
2
5
M
C
L
K
Z
1
2
6
M
C
L
K
1
2
7
G
N
D
5
1
2
8
BYPASS
192
NC0
191
PWM5
190
PWM4
189
PWM3
188
NC1
187
GPO[6]
186
GPO[5]
185
GPO[4]
184
VDDP2
183
GND14
182
GND15
181
VDDC3
180
GPO[3]
179
GPO[2]
178
GPO[1]
177
GPO[0]
176
GND16
175
VDDM2
174
DQS[0]
173
MDATA[0]
172
MDATA[1]
171
MDATA[2]
170
MDATA[3]
169
MDATA[4]
168
MDATA[5]
167
MDATA[6]
166
MDATA[7]
165
MDATA[8]
164
MDATA[9]
163
MDATA[10]
162
MDATA[11]
161
GND17
160
VDDM3
159
MDATA[12]
158
MDATA[13]
157
MDATA[14]
156
MDATA[15]
155
DQS[1]
154
DQM[0]
153
GND18
152
VDDC4
151
MADR[11]
150
MADR[10]
149
MADR[9]
148
MADR[8]
147
GND19
146
VDDM4
145
MADR[7]
144
MADR[6]
143
MADR[5]
142
MADR[4]
141
MADR[3]
140
MADR[2]
139
MADR[1]
138
MADR[0]
137
WEZ
136
CASZ
135
GND20
134
VDDM5
133
RASZ
132
BADR[0]
131
BADR[1]
130
AVDD_PLL2
129
A
V
D
D
_
P
L
L
1
2
5
6
X
IN
2
5
5
X
O
U
T
2
5
4
P
W
M
1
2
5
3
P
W
M
0
2
5
2
V
I_
C
K
B
2
5
1
N
C
2
2
5
0
N
C
3
2
4
9
N
C
4
2
4
8
N
C
5
2
4
7
V
D
D
C
5
2
4
6
G
N
D
2
1
2
4
5
V
I_
D
A
T
A
[3
1
]
2
4
4
V
I_
D
A
T
A
[3
0
]
2
4
3
V
I_
D
A
T
A
[2
9
]
2
4
2
V
I_
D
A
T
A
[2
8
]
2
4
1
B
U
S
T
Y
P
E
2
4
0
G
N
D
2
2
2
3
9
V
D
D
P
3
2
3
8
V
I_
D
A
T
A
[2
7
]
2
3
7
V
I_
D
A
T
A
[2
6
]
2
3
6
V
I_
D
A
T
A
[2
5
]
2
3
5
V
I_
D
A
T
A
[2
4
]
2
3
4
N
C
6
2
3
3
N
C
7
2
3
2
N
C
8
2
3
1
N
C
9
2
3
0
N
C
1
0
2
2
9
N
C
1
1
2
2
8
L
V
B
O
M
2
2
7
L
V
B
O
P
2
2
6
V
D
D
C
6
2
2
5
G
N
D
2
3
2
2
4
G
N
D
2
4
2
2
3
V
D
D
P
4
2
2
2
L
V
B
1
M
2
2
1
L
V
B
1
P
2
2
0
L
V
B
2
M
2
1
9
L
V
B
2
P
2
1
8
L
V
B
C
K
M
2
1
7
L
V
B
C
K
P
2
1
6
L
V
B
3
M
2
1
5
L
V
B
3
P
2
1
4
V
D
D
C
7
2
1
3
G
N
D
2
5
2
1
2
L
V
A
0
M
2
1
1
L
V
A
0
P
2
1
0
L
V
A
1
M
2
0
9
L
V
A
1
P
2
0
8
L
V
A
2
M
2
0
7
L
V
A
2
P
2
0
6
L
V
A
C
K
M
2
0
5
L
V
A
C
K
P
2
0
4
G
N
D
2
6
2
0
3
V
D
D
P
5
2
0
2
L
V
A
3
M
2
0
1
L
V
A
3
P
2
0
0
N
C
1
2
1
9
9
N
C
1
3
1
9
8
N
C
1
4
1
9
7
N
C
1
5
1
9
6
N
C
1
6
1
9
5
N
C
1
7
1
9
4
G
N
D
2
7
1
9
3
G
N
D
2
6
6
IC334A
MST6181
C420
0.1uF
C391
0.1uF
C394
0.1uF C410
0.1uF
R797 22
C383
0.1uF
C683
0.047uF
C387
0.1uF
C398
0.1uF
C562
1uF
1
3
5
7
8
6
4
2
RA329 22
GND
GND
+2.5V_MEM
+2.5V_MEM
+2.5V_MEM
+3.3V_MAIN
GND
GND
GND
GND
GND
GND
VDD_MPLL
AVDD_DVI
AVDD_DVI
GND
AVDD_DVI
AVDDA
GND
VDDP
VDDC
VDDC VDDP
GND
VDDP
VDDM
AVDD_PLL2 VDDM
VDDC
VDDP
AVDD_DVI
VDDP
VDDC
AVDD_PLL2
VDD_MPLL
GND
+5V_MAIN
GND GND
+5V_MAIN
AVDDA
GND
VDD_MPLL
AVDD_DVI
VDDP
VDDC
AVDDA
AVDD_PLL2
+3.3V_MAIN
+1.8V_MAIN
GND
VDDM
VDDC
GND
GND
+2.5V_MEM
VDDM
RX2-
RX2+
RX1-
RX1+
RX0-
RX0+
RXC-
RXC+
RED_IN
PC_HSYNC_IN
BLUE_IN
PC_VSYNC_IN
GREEN_IN
V
I_
C
K
B
FSADDR[11..0]
FSVREF
FSBKSEL0
FSBKSEL1
FSCLK-
FSCLK+
FSCKE
FSCLK+
FSCLK-
FSCKE
/FSRAS
/FSCAS
/FSWE
FSDQS2
FSDQM1
FSDQM0
FSDATA[31..0]
T
X
A
0
-
T
X
A
0
+
T
X
A
1
+
T
X
A
1
-
T
X
A
2
+
T
X
A
2
-
T
X
A
C
+
T
X
A
C
-
T
X
A
3
+
T
X
A
3
-
B_GND_S
G_GND_S
R_GND_S
COM_PR_GND
COM_PR
COM_SYNC
COM_PB_GND
COM_PB
COM_Y
COM_Y_GND
V
I_
D
A
T
A
[0
..
7
]
INV_DIM
HDMI _DDC_DAT
HDMI _DDC_CLK
A
L
E
_
S
C
A
L
E
R
SCALER_RESET
R
D
_
S
C
A
L
E
R
W
R
_
S
C
A
L
E
R
A
D
0
A
D
1
A
D
2
A
D
3
AUDI O_MUTE
AMP_STANDBY
FSBKSEL0
/FSRAS
/FSCAS
/FSWE
HDCP_CONTROL
FSBKSEL1
SW_PANEL
INV_CTRL
AUDI O_SWB
AUDI O_SWA
A/D DIM SELECT
HPD_CONTROL
HP_VOL
PWM_DIM
M
S
T
6
_
A
U
M
C
K
M
S
T
6
_
A
U
W
S
M
S
T
6
_
A
U
S
C
K
M
S
T
6
_
A
U
S
D
ADC-B[7..0]
VCLK-HDMI
DDR : 2.5V
SDRAM : 3.3V
GND
GND
R740 *
+3.3V_MAIN
MST6_AUWS
MST6_AUSCK
MST6_AUSD
HDMI 1_AUDIOR
HDMI 1_AUDIOL
GND
SDATA
1
SCLK
2
LRCK
3
MCLK
4
OUTR
5
GND
6
VCC
7
OUTL
8
IC317
CS4334
R675
100
R695
10K
GND
R690
1k
C689
10uF/16V
C578
1n
R676
100
R685
270K
R677
100
R678 100
+5V_AUDIO
R686
270K
GND
R696
10K
R689
1k
C577
1n
1'nd HDMI
MST6_AUMCK
S
P
D
IF
_
H
D
M
I1
TXA0+
TXA1+
TXA1-
TXA0-
TXA2+
TXAC-
TXAC+
TXA3+
TXA3-
TXA2-
R746 *
P1
1
P2
2
P3
3
P4
4
P5
5
P6
6
P7
7
P8
8
P9
9
P10
10
P11
11
P12
12
P13
13
P14
14
P15
15
P16
16
P17
17
P18
18
P19
19
P20
20
P21
21
P22
22
P23
23
P24
24
P25
25
P26
26
P27
27
P28
28
P29
29
P30
30
P31
31
P32
32
S320
MOLEX
R744 *
R743 *
C682
100nF
R742 *
GND
+3.3V_MAIN
GND
GND
GND
TXA0-
TXA0+
TXA1-
TXA1+
TXA2-
TXA2+
TXAC-
TXAC+
TXA3-
TXA3+
LCD_VDD
LVDS_MAP_SEL
ferrit bead
R747 *
R748 *
GND
DQS0
B2
DQS1
H13
DQS3
B13
DQS2
H2
DQ0
B7
DQ1
C6
DQ2
B6
DQ3
B5
DQ4
C2
DQ5
D3
DQ6
D2
DQ7
E2
DQ8
K13
DQ9
K12
DQ10
J13
DQ11
J12
DQ12
G13
DQ13
G12
DQ14
F13
DQ15
F12
DQ16
F3
DQ17
F2
DQ18
G3
DQ19
G2
DQ20
J3
DQ21
J2
DQ22
K2
DQ23
K3
DQ24
E13
DQ25
D13
DQ26
D12
DQ27
C13
DQ28
B10
DQ29
B9
DQ30
C9
DQ31
B8
DM0
B3
DM3
B12
DM1
H12
DM2
H3
VSSQ
B4
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E9
VSSQ
E6
VSSQ
F5
VSSQ
F10
VSSQ
G10
VSSQ
G5
VSSQ
H5
VSSQ
H10
VSSQ
J10
VSSQ
J5
VSSQ
K5
VSSQ
K10
VSSQ
B11
VDDQ
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F11
VDDQ
F4
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K11
VDDQ
K4
n
c
C
4
n
c
C
1
1
n
c
H
4
n
c
H
1
1
n
c
L
1
2
n
c
L
1
3
n
c
M
3
n
c
M
4
n
c
N
3
VSS
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VDD
D8
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
D7
VDD
E4
A0
N5
A1
N6
A2
M6
A3
N7
A4
N8
A5
M9
A6
N9
A7
N10
A8/AP
N11
A9
M8
A10
L6
A11
M7
BA0
N4
BA1
M5
C
A
S
L
2
W
E
L
3
R
F
U
1
L
9
R
F
U
2
M
1
0
R
A
S
M
2
C
K
M
1
1
C
K
M
1
2
C
K
E
N
1
2
M
C
L
M
1
3
V
R
E
F
N
1
3
C
S
N
2
V
S
S
_
th
er
m
al
F
7
V
S
S
_
th
er
m
al
F
8
V
S
S
_
th
er
m
al
J9
V
S
S
_
th
er
m
al
F
9
V
S
S
_
th
er
m
al
G
6
V
S
S
_
th
er
m
al
G
7
V
S
S
_
th
er
m
al
G
8
V
S
S
_
th
er
m
al
G
9
V
S
S
_
th
er
m
al
H
6
V
S
S
_
th
er
m
al
H
7
V
S
S
_
th
er
m
al
H
8
V
S
S
_
th
er
m
al
H
9
V
S
S
_
th
er
m
al
J6
V
S
S
_
th
er
m
al
J7
V
S
S
_
th
er
m
al
F
6
V
S
S
_
th
er
m
al
J8
K4D263238G-GC
IC335
K4D263238G-GC_2
FSDQS0
FSDQS3
FSDQM1
FSDQM0
FSDQS1
GND
GND
+2.5V_MEM
GND
R641 150
FSDQS1
FSDQS3
FSDQS0
FSDQS2
PWM_33V
GND
t762
L354
HH-2012-121
FSDATA[31..0]
FSADDR[11..0]
FSVREF
FSDQS0
FSDQS3
FSDQS2
FSDQS1
6
19
23
24
18
17
25
26 27
Hauptplatte / Main Board – Scaler
power on (trigger: +12V)
6
switch on (trigger: +3.3V_MAIN)
6
&
*
(
£
≤
∞ §
≥
GR
UNDIG Ser
vice
Chassis LM
2 - 2