Platinenabbildungen und Schaltpläne / Layout of PCBs and Circuit Diagrams
Livance – GDP 31…
3 - 6
GRUNDIG Service
NAME
TYPE
PIN
DESCRIPTION
UART0
RXD0
I
94
UART0 serial data input from external serial device
TXD0
B
93
UART0 serial data output to an external serial device
RTS0
B
96
UART0 request to send
CTS0
B
95
UART0 Clear to Send signal
SSP0
SSPOUT0/DTR0
B
92
SSP0 data out or UART0 Data Terminal Ready signal
SSPIN0/BAUD0
B
90
SSP0 data in or 16X clock for USART function in UART0
SSPCLK0/RTS1
B
88
SSP0 clock or Request To Send function in UART1
System Interface
RSTP-
I
81
RESET_Power- from system, used to reset frequency synthesizer & rest of chip
SRST-
O
80
Active low RESET signal for peripheral reset
Video Interface
CVBS/C
O
118
Composite video output for NTSC/PAL or Chrominance output for S-Video
Y/G
O
114
Luminance for NTSC/PAL S-Video and component output, G output for SCART
C/Cb/B
O
112
Chrominance output for NTSC/PAL S-Video, Cb output for component, Blue output for
SCART
CVBS2/Cr/R
O
110
A second CVBS output for composite, Cr output for component, Red output for SCART
IOM
O
111
Cascaded DAC differential output used to dump current into external resistor for power
VREF
I
116
Input voltage reference (1.2V typ) for output DACs
RSET
O
119
Current setting resistor of output DACs
COMP
O
120
Compensation capacitor connection
VddDAC
P
108
DAC Digital Power/2.5V
VssDAC
P
109
DAC Digital Ground
Vaa3
P
113
DAC Analog Power/3.3V
Vaa
P
117
DAC Analog Power/2.5V
Vssa
P
115
DAC Analog Ground
Video Port
VIO[7:0]
B
126-131, 133-134 Bidirectional digital video port data bus
HSYNC
B
124
Bidirectional HSYNC signal for devices that do not use EAV/SAV codes
VSYNC
B
123
Bidirectional VSYNC signal for devices that do not use EAV/SAV codes
VIOCLK
B
122
VCLK input/output for Video I/O Port function
Audio Interface
AOUT0
O
74
Serial audio output data to audio DAC for Left & Right channels
AOUT1
O
73
Serial audio output data to audio DAC for Center & LFE channels
AOUT2
O
72
Serial audio output data to audio DAC for Surround Left & Right channels
AOUT3
O
71
Serial audio output data to audio DAC for Left & Right channels for down-mixed stereo
SPDIF
O
68
S/PDIF digital audio output
ACLK
O
78
Audio interface serial data clock, common clock for DACs & ADC
PCMCLK
O
76
Audio DAC PCM sampling clock frequency, common clock for DACs & ADC
LRCLK
O
79
Left/Right Channel clock, common clock for DACs & ADC
AIN
I
70
Digital audio input for digital micro
Clock Signals
CXI
I
98
Crystal Input pin for on-chip oscillator or system input clock
CXO
O
99
Crystal Output pin for on-chip oscillator
OSCVdd
P
101
Oscillator Power (2.5V)
OSCVss
P
100
Oscillator Ground
MVCKVdd
P
102
Main & Video Clock PLL Power (3.3V)
MVCKVss
P
104
Main & Video Clock PLL Ground
ACLKVdd
P
107
Audio clock PLL Power (3.3V)
ACLKVss
P
105
Audio clock PLL Ground
Test
SCEN
I
103
Scan Chain test enable
SCMD
I
106
Scan Chain test mode
PWR & GND
VDD
P
*
Core Power =2.5V, pins: 4, 34, 77, 89, 135, 159, 192, 212
Vss
P
*
Core & Ring Ground, pins: 17, 47, 69, 85, 121, 171, 201, 230
VDDIO
P
*
I/O Pad power = 3.3V, pins: 1, 10, 19, 27, 36, 44, 53, 62, 75, 91, 125, 140, 154, 169, 181, 196, 210, 224, 233
VSSIO
P
*
I/O Pad ground, pins: 6, 14, 23, 31, 40, 49, 57, 67, 82, 97, 132, 147, 162, 177, 188, 204, 218, 228, 237
