Grundig 46 VLE 8270 BL, Руководство по обслуживанию

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GR
UNDIG
Ser
vice
Chassis TK
2 - 32
P_LVDS1_4_D[0..4]
N_LVDS1_4_D[0..4]
P_LVDS1_2_D[0..4]
N_LVDS1_2_D[0..4]
P_LVDS2_4_D[0..4]
N_LVDS2_4_D[0..4]
P_LVDS2_1_D[0..4]
P_LVDS2_C[1..4]
N_LVDS2_1_D[0..4]
P_LVDS2_2_D[0..4]
N_LVDS2_2_D[0..4]
N_LVDS2_C[1..4]
P_LVDS2_3_D[0..4]
N_LVDS2_3_D[0..4]
P_LVDS1_1_D[0..4]
P_LVDS1_C[1..4]
N_LVDS1_1_D[0..4]
P_LVDS1_CA[1..4]
N_LVDS1_CA[1..4]
N_LVDS1_C[1..4]
P_LVDS1_3_D[0..4]
N_LVDS1_3_D[0..4]
P_LVDS1_1_D0
N_LVDS1_1_D0
P_LVDS1_1_D1
N_LVDS1_1_D1
P_LVDS1_1_D2
N_LVDS1_1_D2
P_LVDS1_1_D3
N_LVDS1_1_D3
P_LVDS1_1_D4
N_LVDS1_1_D4
P_LVDS1_2_D1
N_LVDS1_2_D1
P_LVDS1_2_D2
N_LVDS1_2_D2
P_LVDS1_2_D3
N_LVDS1_2_D3
P_LVDS1_2_D4
N_LVDS1_2_D4
P_LVDS1_2_D0
N_LVDS1_2_D0
P_LVDS1_3_D0
N_LVDS1_3_D0
P_LVDS1_3R_D0
N_LVDS1_3R_D0
P_LVDS1_3_D1
N_LVDS1_3_D1
P_LVDS1_3R_D1
N_LVDS1_3R_D1
P_LVDS1_3_D2
N_LVDS1_3_D2
P_LVDS1_3R_D2
N_LVDS1_3R_D2
P_LVDS1_3_D3
N_LVDS1_3_D3
P_LVDS1_3R_D3
N_LVDS1_3R_D3
P_LVDS1_3_D4
N_LVDS1_3_D4
P_LVDS1_3R_D4
N_LVDS1_3R_D4
P_LVDS1_4_D0
N_LVDS1_4_D0
P_LVDS1_4R_D0
N_LVDS1_4R_D0
P_LVDS1_4_D1
N_LVDS1_4_D1
P_LVDS1_4R_D1
N_LVDS1_4R_D1
P_LVDS1_4_D2
N_LVDS1_4_D2
P_LVDS1_4R_D2
N_LVDS1_4R_D2
P_LVDS1_4_D3
N_LVDS1_4_D3
P_LVDS1_4R_D3
N_LVDS1_4R_D3
P_LVDS1_4_D4
N_LVDS1_4_D4
P_LVDS1_4R_D4
N_LVDS1_4R_D4
N_LVDS2_1_D1
P_LVDS2_2_D1
N_LVDS2_2_D1
P_LVDS2_2_D2
N_LVDS2_2_D2
P_LVDS2_2_D3
N_LVDS2_2_D3
P_LVDS2_2_D4
N_LVDS2_2_D4
P_LVDS2_1_D1
P_LVDS2_2_D0
N_LVDS2_2_D0
N_LVDS2_1_D2
P_LVDS2_1_D2
P_LVDS2_1_D1
N_LVDS2_1_D1
EXT_VBR_OUT1b
P_LVDS2_1_D2
N_LVDS2_1_D2
P_LVDS2_1_D3
N_LVDS2_1_D3
SLVDS1b
PNL_SCL
PNL_SDA
DISP_EN_OUT1b
ODSEL1b
LVDS_BITSEL1b
P_LVDS2_1_D4
N_LVDS2_1_D4
N_LVDS2_1_D0
P_LVDS2_1_D0
P_LVDS2_1_D0
N_LVDS2_1_D0
P_LVDS2_4_D0
N_LVDS2_4_D0
P_LVDS2_4R_D0
N_LVDS2_4R_D0
P_LVDS2_4_D1
N_LVDS2_4_D1
P_LVDS2_4R_D1
N_LVDS2_4R_D1
P_LVDS2_4_D2
N_LVDS2_4_D2
P_LVDS2_4R_D2
N_LVDS2_4R_D2
P_LVDS2_4_D3
N_LVDS2_4_D3
P_LVDS2_4R_D3
N_LVDS2_4R_D3
P_LVDS2_4_D4
N_LVDS2_4_D4
P_LVDS2_4R_D4
N_LVDS2_4R_D4
P_LVDS2_3_D1
N_LVDS2_3_D1
P_LVDS2_3_D2
N_LVDS2_3_D2
P_LVDS2_3_D3
N_LVDS2_3_D3
P_LVDS2_3_D4
N_LVDS2_3_D4
P_LVDS2_3_D0
N_LVDS2_3_D0
P_LVDS1_CA1
P_LVDS1_C1
N_LVDS1_C1
N_LVDS1_CA1
N_LVDS1R_C2
P_LVDS1_C2
N_LVDS1_CA2
P_LVDS1R_C2 P_LVDS1_CA2
P_LVDS_CK2
N_LVDS_CK2
P_LVDS1_C3
N_LVDS1_C3
N_LVDS1R_C4
P_LVDS1_C4
N_LVDS1_C4
P_LVDS1R_C4
P_LVDS_CK4
N_LVDS_CK4
N_LVDS2_C1 N_LVDS2R_C2
P_LVDS_CK2
N_LVDS_CK2
N_LVDS2_C2
P_LVDS2R_C2 P_LVDS2_C2
N_LVDS2R_C1
P_LVDS2R_C1 P_LVDS2_C1
N_LVDS1_C2
P_LVDS2_C3
N_LVDS2_C3
N_LVDS2_CA3 N_LVDS2R_C4
P_LVDS2_C4
N_LVDS2_C4
N_LVDS2_CA4
P_LVDS2R_C4 P_LVDS2_CA4
N_LVDS2R_C3
P_LVDS2R_C3 P_LVDS2_CA3
P_LVDS_CK4
N_LVDS_CK4
P_LVDS1_CA3
N_LVDS1_CA3
P_LVDS1_CA4
N_LVDS1_CA4
P_LVDS2_CA3
N_LVDS2_CA3
N_LVDS2_CA4
P_LVDS2_CA4
TV_PNL_SCL
TV_PNL_SDA
SLVDS1a
LVDS_BITSEL1a
PANEL_PWR
PANEL_PWR
EXT_VBR_IN1a
EXT_VBR_OUT1a
DISP_EN_OUT1a
ODSEL1a
PNL_SCL
PNL_SDA
N_LVDS2_1_D3
P_LVDS2_1_D3
N_LVDS2_1_D4
P_LVDS2_1_D4
N_LVDS2R_C1
P_LVDS2R_C1
N_LVDS2R_C2
P_LVDS2R_C2
N_LVDS2_2_D2
P_LVDS2_2_D2
P_LVDS2_2_D0
N_LVDS2_2_D0
P_LVDS2_2_D1
N_LVDS2_2_D1
P_LVDS2R_C4
N_LVDS2R_C4
P_LVDS2_4R_D0
N_LVDS2_4R_D0
P_LVDS2_4R_D1
N_LVDS2_4R_D1
N_LVDS2_4R_D2
P_LVDS2_4R_D2
P_LVDS2_4R_D3
N_LVDS2_4R_D3
P_LVDS2_4R_D4
N_LVDS2_4R_D4
P_LVDS2_3_D0
N_LVDS2_3_D0
N_LVDS2R_C3
P_LVDS2R_C3
P_LVDS2_3_D1
N_LVDS2_3_D1
P_LVDS2_3_D2
N_LVDS2_3_D2 P_LVDS2_3_D3
N_LVDS2_3_D3
P_LVDS2_3_D4
N_LVDS2_3_D4
SLVDS2
TV_LVDS_SCL
TV_LVDS_SDA
DISP_EN_OUT2
ODSEL2
LVDS_BITSEL2
EXT_VBR_OUT2
EXT_VBR_IN2
N_LVDS2_2_D3
P_LVDS2_2_D3
N_LVDS2_2_D4
P_LVDS2_2_D4
P_LVDS1_2_D4
N_LVDS1_2_D4
P_LVDS1_2_D3
N_LVDS1_2_D3
P_LVDS1_2_D2
N_LVDS1_2_D2
P_LVDS1_2_D1
N_LVDS1_2_D1
N_LVDS1_2_D0
P_LVDS1_2_D0
P_LVDS1R_C1
N_LVDS1R_C1
P_LVDS1R_C2
N_LVDS1R_C2
N_LVDS1_1_D3
P_LVDS1_1_D3
N_LVDS1_1_D2
P_LVDS1_1_D2
P_LVDS1_1_D1
N_LVDS1_1_D1
P_LVDS1_1_D4
N_LVDS1_1_D4
P_LVDS1_1_D0
N_LVDS1_1_D0
P_LVDS1_3R_D2
N_LVDS1_3R_D2
P_LVDS1_3R_D3
N_LVDS1_3R_D3
P_LVDS1_3R_D4
N_LVDS1_3R_D4
P_LVDS1R_C4
N_LVDS1R_C4
N_LVDS1_4R_D1
P_LVDS1_4R_D1
P_LVDS1_4R_D2
N_LVDS1_4R_D2 P_LVDS1_4R_D3
N_LVDS1_4R_D3
N_LVDS1_4R_D4
P_LVDS1_4R_D4
N_LVDS1R_C3
P_LVDS1R_C3
P_LVDS1_3R_D1
N_LVDS1_3R_D1
EXT_VBR_OUT2
EXT_VBR_IN2
TV_PNL_SDA
TV_PNL_SCL
DISP_EN_OUT2
ODSEL2
LVDS_BITSEL2
PANEL_PWR
N_LVDS1_3R_D0
P_LVDS1_3R_D0
P_LVDS1_4R_D0
N_LVDS1_4R_D0
PANEL_PWR
P_LVDS1R_C1
N_LVDS1R_C1
N_LVDS1R_C3
P_LVDS1R_C3
nSRST
TV_LVDS_SCL
TV_LVDS_SDA
nSRST
SLVDS2
EXT_VBR_OUT1a EXT_VBR_OUT1b
EXT_VBR_IN1a EXT_VBR_IN1b
SLVDS1a SLVDS1b
DISP_EN_OUT1a DISP_EN_OUT1b
ODSEL1a ODSEL1b
LVDS_BITSEL1a LVDS_BITSEL1b
EXT_VBR_IN1b
P_LVDS1_1_D[0..4]
P_LVDS2_1D[0..4]
P_LVDS2_2D[0..4]
P_LVDS2_C[1..4]
P_LVDS2_3D[0..4]
N_LVDS2_C[1..4]
P_LVDS2_4D[0..4]
N_LVDS2_1D[0..4]
N_LVDS2_2D[0..4]
N_LVDS2_3D[0..4]
N_LVDS2_4D[0..4]
P_LVDS1_2_D[0..4]
P_LVDS1_C[1..4]
P_LVDS1_3_D[0..4]
N_LVDS1_C[1..4]
P_LVDS1_4_D[0..4]
P_LVDS1_CA[1..4]
N_LVDS1_CA[1..4]
N_LVDS1_1_D[0..4]
N_LVDS1_2_D[0..4]
N_LVDS1_3_D[0..4]
N_LVDS1_4D[0..4]
N_LVDS2_CA4
P_LVDS2_CA4
P_LVDS2_CA3
N_LVDS2_CA3
TV_PNL_SDA
TV_PNL_SCL
nSRST
IR_KEY
EXT_CLK
TV_RST
__ LVDS ___ ___ Dx
P 1:In 1:Odd 1:D0
N 2:Out 2:Even 2:D1
3:Odd 3:D2
4:Even 4:D3
3R:Odd(100Hz)
4R:Even(100Hz)
By-pass FPGA
M2
M1
M3
M4
N1
N2
P1
P2
R1
R2
T1
T2
B22
B21
C22
C21
D22
D21
E22
E21
F22
F21
H22
H21
J22
J21
K22
K21
L22
L21
M22
M21
P21
P22
N21
N22
AA2
AA1
Y2
Y1
W2
W1
V2
V1
U2
U1
AA11
AB11
R177 NM R177 NM
R98 NM R98 NM
R133 120R R133 120R
R73
100R_%1_A
R73
100R_%1_A
R128
174R
R128
174R
R150
100R_%1_A
R150
100R_%1_A
R190 0R R190 0R
R102
100R_%1_A
R102
100R_%1_A
R112
0R
R112
0R
R165 120R R165 120R
R131 120R
R208 100R R208 100R
R123
100R_%1_A
R123
100R_%1_A
R100 NM R100 NM
R161 120R R161 120R
R113 120R R113 120R
R164 NM R164 NM
R97
NM
R97
NM
R95 NM R95 NM
R146
120R
R146
120R
R210 100R R210 100R
R218 0R R218 0R
R84
100R_%1_A
R84
100R_%1_A
R76
100R_%1_A
R76
100R_%1_A
R186 0R R186 0R
R153 120R R153 120R
R173
174R
R173
174R
R132
174R
R132
174R
R213 0R R213 0R
S8 S8
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
41
42
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R214 0R R214 0R
R157
174R
R157
174R
R87
100R_%1_A
R87
100R_%1_A
R127 120R R127 120R
R101 0R R101 0R
R184
100R_%1_A
R184
100R_%1_A
R209 100R R209 100R
R79
100R_%1_A
R79
100R_%1_A
R142 120R R142 120R
R137
174R
R137
174R
R116
174R
R116
174R
R191 0R R191 0R
R74
100R_%1_A
R74
100R_%1_A
R114
0R
R114
0R
R126 120R R126 120R
R96 NM R96 NM
R110 0R R110 0R
R130
100R_%1_A
R130
100R_%1_A
R171 120R R171 120R
R160
174R
R160
174R
R120 120R R120 120R
R103
NM
R103
NM
R200 0R R200 0R
R178 NM R178 NM
R149 120R R149 120R
R85
100R_%1_A
R85
100R_%1_A
R144 120R R144 120R
R88
100R_%1_A
R88
100R_%1_A
R187 0R R187 0R
R172
174R
R172
174R
R167
NM
R167
NM
R92
100R_%1_A
R92
100R_%1_A
S10 S10
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
41
42
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R107 0R R107 0R
R169 120R R169 120R
R185
100R_%1_A
R185
100R_%1_A
R129 120R R129 120R
R82
100R_%1_A
R82
100R_%1_A
R143 120R R143 120R
R148
174R
R148
174R
R124
174R
R124
174R
R163 NM R163 NM
R109 0R R109 0R
R215 0R R215 0R
R94
NM
R94
NM
R216 0R R216 0R
R188
0R
R188
0R
R121 120R R121 120R
R108
100R_%1_A
R108
100R_%1_A
R138
100R_%1_A
R138
100R_%1_A
R176 120R R176 120R
R122 120R R122 120R
R106
0R
R106
0R
R183 0R R183 0R R202 0R R202 0R
R156 120R R156 120R
R140 120R R140 120R
R89
100R_%1_A
R89
100R_%1_A
R151
174R
R151
174R
R93
100R_%1_A
R93
100R_%1_A
R181 0R R181 0R
R212 0R R212 0R
R77 100R R77 100R
R201 0R R201 0R
R135 120R R135 120R
S7 S7
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
41
42
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R75
100R_%1_A
R75
100R_%1_A
R179 120R R179 120R
R104 0R R104 0R
R86
100R_%1_A
R86
100R_%1_A
R207 100R R207 100R
R152 120R R152 120R
R158
174R
R158
174R
R136
174R
R136
174R
R80
100R_%1_A
R80
100R_%1_A
R174 NM R174 NM
R166
100R_%1_A
R166
100R_%1_A
R115 120R R115 120R
R182
0R
R182
0R
R125 120R R125 120R
R117
174R
R117
174R
R105 0R R105 0R
R189 0R R189 0R
R145
100R_%1_A
R145
100R_%1_A
R162 120R
R111
0R
R111
0R
R90
100R_%1_A
R90
100R_%1_A
R72
100R_%1_A
R72
100R_%1_A
R159 120R R159 120R
R134 120R R134 120R
R217 0R R217 0R
R91
100R_%1_A
R91
100R_%1_A
R175 NM R175 NM
R141
174R
R141
174R
R139 120R R139 120R
R168 NM R168 NM
R78
100R
R78
100R
R203 0R R203 0R
R154 120R R154 120R
R81
100R_%1_A
R81
100R_%1_A
R99 NM R99 NM
R119
174R
R119
174R
R211 100R
R147
174R
R147
174R
R180 0R R180 0R
S9 S9
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
41
42
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R83
100R_%1_A
R83
100R_%1_A
R170
100R_%1_A
R118 120R R118 120R
R155 120R R155 120R
27
26
43
42
28
27
26
28
11
12
Videoplatte / Video Board – LVDS
§
≥
•
! @
+
Power on (trigger: +5V2_ST)
,
Switch on (trigger: VCC12V)