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Section 3 Ñ Functional Description
Analog Output Option (DAC) Submodule
The Analog Output (DAC: Digital-to-Analog Converter) option consists of
the 064912 DAC Support board and the 064815 DAC board. The Support
board prepares the video signal for conversion and also provides decoding
and latching of the clock and control signals used by the DAC. The DAC
board does the digital-to-analog signal conversion.
064912 DAC Support Board
The DAC Support board (Figure 3-18) selects between the switcherÕs
internal digital Program and Clean Feed video signals and delays, blanks,
and up-converts the selected signal to an 8:8:8 format. The upconversion
provides superior frequency response and group delay characteristics with
a minimum of adjustments. In addition, the board generates timing pulses
and control signals and filters the analog power supply voltages to
minimize digital noise. The Support board supplies the processed video to
the 064815 DAC board for digital to analog conversion.
Under control of the switcherÕs control data bus, latch ICs U23, U8, U24,
and U4 select either the Clean Feed or the Program digital video signal for
processing and routing to the DAC board. Delay ICs U7 and U3 introduce
variable delays to the Y and C components of the video signal to ensure
that the analog output aligns with reference video. ASIC U11 mixes
between the video signal and black in order to add blanking to the video.
Following signal selection and processing, five half-band filter ASICS, U1,
U2, U5, U6, and U9, interpolate the luma and chroma components of the
video signal to double clock rate (27 MHz or 36 MHz). The luminance
component passes through a fixed delay (U10) to maintain it in time with
the chroma components. The cosited chroma component is separated into
U and V components by clocking the first chip in each path (U2 and U6)
with chroma clocks that are opposite in phase. After leaving the filter
ASICs, the luma and chroma components exit the Support board and enter
the DAC board.
The Support board derives clocks and control data from system clock and
control signals. IC U15 fans out the system clock, and PAL IC U18 sets
correct chroma phase for the clocks. A clock doubler consisting of U19 and
associated components provides the 27 MHz or 36 MHz clocks required by
the filter ASICs. IC U12 delays system sync blanking to align it with the
video signal, and ICs U16 and U17 create sync, blanking, and clamp pulses
from the system blanking signals. Jumpers allow the user to specify
blanking width and presence or absence of setup. ICs U21, U14, U20, U22,
and U25 latch control signals from the system data bus to provide control
of circuits on the Support and DAC boards.
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