Gigabyte MJ11-EC0, Руководство пользователя, Страница: 47 / 109

- 47 - BIOS Setup
2-2-11-1 Zen Common Options
Parameter Description
Zen Common Options
RedirectForReturnDis
From a workaround for GCC/C000005 issue for XV Core on CZ A0,
setting MSRC001_1029 Decode Configuration (DE_CFG) bit 14
[DecfgNoRdrctForReturns] to 1.
Options available: Auto
,
1, 0. Default setting is Auto .
L2 TLB Associativity
0 - L2 TLB ways [11:8] are fully associative.
1 - L2 TLB ways [11:8] are 4K-only
Options available: 0, 1, Auto. Default setting is
Auto .
Platform First Error Handling
Enable/Disable PFEH, cloak individual banks, and mask deferred error
interrupts from each bank.
Options available: Auto, Enabled, Disabled. Default setting is
Auto .
Core Performance Boost
Enable/Disable the Core Performance Boost function.
Options available: Auto, Disabled. Default setting is
Auto .
Enable IBS
Enable/Disable IBS.
Options available: Auto, Enabled, Disabled. Default setting is
Auto .
Global C-State Control
Controls the IO based C-state generation and DF C-states.
Options available: Auto, Enabled, Disabled. Default setting is
Auto .
Opcache Control
Enable/Disable the Opcache control.
Options available: Auto, Enabled, Disabled. Default setting is
Auto .
SEV-ES ASID Space Limit C
The SEV VMs using ASIDs below the SEV-ES ASID Space Limit must
enable the SEV-ES feature. The valid values for this field are from 0x1 (1)
to 0x10 (16). Default setting is 1.