Furuno CH-270, Руководство по обслуживанию

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2.4 Tilting Transducer
Fig. 2.4 shows the simplified tilt control circuit.
The 4-phase stepping motor is controlled by a phased generator U3 on DRV board.
The CPU outputs a clock signal (TIM 1) to the phased pulse generator U3. Receiving the clock
signal, the phased pulse generator outputs HIGH level in the sequence shown in Table 2-2, and
the motor rotates accordingly. The phased pulse generator outputs HIGH level in reverse
sequence when the H/L condition of TI DN/UP signal (TIM2) is changed and the motor rotates
in opposite direction.
Table 2.2
Clock Cycle (DN/UP = H) Clock Cycle (DN/UP = L)
Output
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
Ø
1
L L L L L H H H H H L L L L L H
Ø
2 L L L H H H L L L H H H L L L L
Ø
3 L H H H L L L L L L L H H H L L
Ø
4 H H L L L L L H L L L L L H H H
As shown in Fig. 2.4, a disc with slits is coupled to the motor through gears to detect tilts of +8°,
-30°, and -93°. The slits activate the sensors (photo interrupters) which generate TI8 and TI93
signals. Using these signals, the CPU reads the tilt angle as shown in table below.
Table 2.3
+8° Signal (T18) -93° Signal (T193) Tilt
High Low +8°
High High -30°
Low High -93°
At every power-on, the CPU initializes the tile angle to –30°. If the CPU does not detect the tilt
of 30°, error message TILT NG appears.