Fujitsu MB3773 Скачать руководство пользователя страница 11

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MB3773

(Continued)

= +

= −

0.1

5.0

4.5

4.0

−

5.0

4.5

4.0

−

0.1

= +

= −

1.246

1.244

1.242

1.240

1.238

1.236

1.234

3.0 5.0

7.0 9.0

13.0

11.0

17.0 19.0 21.0

15.0

= −

= +

0.1

= +

1.255

1.250

1.245

1.240

−

120

−

160

−

200

−

240

0.1

= +

= −

−

1.27

1.25

1.26

1.24

1.23

1.22

1.21

100

−

100

160

140

120

100

0.1

5 V

Reference voltage

vs. Reference current

High level output voltage

vs. High level output current

(RESET

terminal

)

High level output voltage

vs. High level output current

(RESET terminal)

Reference voltage

vs. Supply voltage

Supply voltage V

(V)

Reference current I

REF

(

Reference voltage

vs. Temperature

Temperature Ta (

Rising reset hold time

vs. Temperature

Temperature Ta (

High level output current I

OH2

(

High level output current I

OH8

(

High level output voltage

(V)

High level output voltage

OH8

(V)

Reference voltage

(V)

Reference voltage

(V)

Reference voltage V

(V)

Rising reset hold time

(ms)

Содержание MB3773

Страница 1: ...s microprocessor systems can provide the fail safe function If MB3773 does not receive the clock pulse from the processor for an specified period MB3773 generates the reset signal FEATURES Precision voltage detection VS 4 2 V 2 5 Detection threshold voltage has hysteresis function Low voltage output for reset signal VCC 0 8 V Typ Precision reference voltage output VR 1 245 V 1 5 With built in watc...

Страница 2: ...MB3773 2 PIN ASSIGNMENT C T RESET CK GND RESET V S V REF V CC 1 2 3 4 8 7 6 5 C T RESET CK GND RESET V S V REF V CC 1 2 3 4 8 7 6 5 TOP VIEW SIP 8P M03 DIP 8P M01 FPT 8P M01 FRONT VIEW ...

Страница 3: ...3 BLOCK DIAGRAM CT _ _ 8 2 7 3 1 4 5 GND RESET VS VCC R S Q 1 24 V 40 kΩ 1 24 V 10 µA 1 2 µA 100 kΩ Watch Dog Timer P G _ Reference Voltage Generator _ Reference AMP VREF 6 COMP O RESET 10 µA Inhibit CK COMP S ...

Страница 4: ... have built in pull up circuit there is no need to connect to external pull up resistor when connected to a high impedance load such as CMOS logic IC It corresponds to 500 kΩ at Vcc 5 V when the voltage of the CK terminal changes from the high level into the Low level pulse generator is sent to the watch dog timer by generating the pulse momentarily at the time of drop from the threshold level Whe...

Страница 5: ... TCK TPR TWD TWR TPR 1 2 3 4 5 5 6 7 8 9 10 11 12 MB3773 Basic Operation VCC RESET RESET CK Logic Circuit TPR ms 1000 CT µF TWD ms 100 CT µF TWR ms 20 CT µF Example CT 0 1 µF TRR ms 100 ms TWD ms 10 ms TWR ms 2 ms RESET RESET CK GND CT VCC ...

Страница 6: ...00 CT µF Because the charging time of CT is added at accurate time from stop of the clock and getting to the output of reset of the clock TWD becomes maximum TWD TWR by minimum TWD 7 Reset time in operating watch dog timer TWR is charging time where the voltage of CT goes up to off threshold 1 4 V for reset TWR ms 20 CT µF Reset of the output is released after CT reaches an off threshold for reset...

Страница 7: ...y affect reliability and could result in device failure No warranty is made with respect to uses operating conditions or combinations not represented on the data sheet Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand Parameter Symbol Rating Unit Min Max Supply voltage VCC 0 3 18 V Input voltage VS 0 3 VCC 0 3 18 V VCK 0 3 1...

Страница 8: ... 5 mV CK threshold voltage VTH Ta 40 C to 85 C 0 8 1 25 2 0 V CK input current IIH VCK 5 0 V 0 1 0 µA IIL VCK 0 0 V 1 0 0 1 CT discharge current ICTD Watch dog timer operating VCT 1 0 V 7 10 14 µA High level output voltage VOH1 VS open IRESET 5 µA 4 5 4 9 V VOH2 VS 0 V IRESET 5 µA 4 5 4 9 Output saturation voltage VOL1 VS 0 V IRESET 3 mA 0 2 0 4 V VOL2 VS 0 V IRESET 10 mA 0 3 0 5 VOL3 VS open IRES...

Страница 9: ... 3 0 µs CK input frequency TCK 20 µs Watch dog timer watching time TWD CT 0 1 µF 5 10 15 ms Watch dog timer reset time TWR CT 0 1 µF 1 2 3 ms Rising reset hold time TPR CT 0 1 µF VCC 50 100 150 ms Output propagation delay time from VCC TPD1 RESET RL 2 2 kΩ CL 100 pF 2 10 µs TPD2 RESET RL 2 2 kΩ CL 100 pF 3 10 Output rising time tR RL 2 2 kΩ CL 100 pF 1 0 1 5 µs Output falling time tF RL 2 2 kΩ CL ...

Страница 10: ...V Supply voltage VCC V Output voltage vs Supply voltage RESET terminal Supply voltage VCC V Pull up 2 2 kΩ Output voltage vs Supply voltage RESET terminal Detection voltage VSH VSL vs Temperature Temperature Ta C Output saturation voltage vs Output sink current RESET terminal Output sink current IOL2 mA Output saturation voltage vs Output sink current RESET terminal Output sink current IOL8 mA Pul...

Страница 11: ...0 60 0 40 CT 0 1 µF VCC 5 V Reference voltage vs Reference current High level output voltage vs High level output current RESET terminal High level output voltage vs High level output current RESET terminal Reference voltage vs Supply voltage Supply voltage VCC V Reference current IREF µA Reference voltage vs Temperature Temperature Ta C Rising reset hold time vs Temperature Temperature Ta C High ...

Страница 12: ... 10 2 10 1 10 0 10 1 10 2 Ta 40 C Ta 25 C 85 C CT terminal capacitance vs Rising reset hold time Watchdog timer watching time vs Temperature Temperature Ta C Reset time vs Temperature Temperature Ta C CT terminal capacitance CT µF At watch dog timer CT terminal capacitance vs Reset time CT terminal capacitance vs Watchdog timer watching time CT terminal capacitance CT µF at watch dog timer CT term...

Страница 13: ...ternal fine tuning type VCC 5V 1 2 3 4 8 7 6 5 MB3773 RESET RESET CK GND Logic circuit Notes Vs detection voltage can be adjusted externally Based on selecting R1 and R2 values that are sufficiently lower than the resistance of the IC s internal voltage divider the detection voltage can be set according to the resistance ratio of R1 and R2 See the table below R1 R2 CT R1 kΩ Ω Ω Ω R2 kΩ Ω Ω Ω Detec...

Страница 14: ...cuit Note Grounding pin 7 at the time of SW ON sets RESET pin 8 to Low and RESET pin 2 to High SW VCC 1 2 3 4 8 7 6 5 MB3773 RESET RESET CK GND Logic circuit Note Feeding the signal to terminal RESIN and turning on Tr sets the RESET terminal to Low and the RESET terminal to High 10 kΩ Tr RESIN 10 kΩ Cr CT a b ...

Страница 15: ...nnected to the NMI terminal and when voltage drops Comp 2 interrupts the logic circuit Use VCC1 5 V to power the comparators Comp 1 and Comp 2 in the external circuit shown above The detection voltage of the VCC2 12 V supply voltage is approximately 9 2 V 9 4 V and has a hysteresis width of approximately 0 2 V VCC2 detection voltage and hysteresis width can be found using the following formulas De...

Страница 16: ... or 12 V supply voltage decreases below its detection voltage VSL the MB3773 RESET terminal is set to High and the MB3773 RESET terminal is set to Low Use VCC1 5 V to power the comparators Comp 1 and Comp 2 in the external circuit shown above The detection voltage of the VCC2 12 V supply voltage is approximately 9 2 V 9 4 V and has a hysteresis width of approximately 0 2 V For the formulas for fin...

Страница 17: ...used to monitor for overvoltage while the MB3773 is used to monitor for low voltage Detection voltages V1L V1H at the time of low voltage are approximately 4 2 V 4 3 V Detection voltages V2L V2H at the time of overvoltage are approximately 6 0 V 6 1 V For the formulas for finding hysteresis width and detection voltage see EXAMPLE 4 Use VCC 5 V to power the comparators Comp 1 and Comp 2 in the exte...

Страница 18: ...ng Supply Voltage Using Delayed Trigger VCC 1 2 3 4 8 7 6 5 MB3773 RESET RESET CK GND Logic circuit Note Adding voltage such as shown in the figure to VCC increases the minimum input pulse width by 50 µs C1 1000 pF C1 VCC 5V 4V CT ...

Страница 19: ...y monitored even while the watch dog timer is inhibited For this reason a reset signal is output at the occurrence of either instantaneous disruption or a sudden drop to low voltage Note that in application examples a and b the hold signal is inactive when the watch dog timer is inhibited at the time of resetting If the hold signal is active when tie microprocessor is reset the solution is to add ...

Страница 20: ...c Using NPN transistor VCC 5 V 1 2 3 4 8 7 6 5 CT MB3773 RESET RESET CK GND Logic circuit R2 1 kΩ HALT R1 1 MΩ d Using PNP transistor VCC 5 V 1 2 3 4 8 7 6 5 CT MB3773 RESET RESET CK GND Logic circuit R2 1 kΩ HALT R1 51 kΩ ...

Страница 21: ...put that can be used Standard TPR TWD and TWR value can be found using the following formulas Formulas TPR ms 100 CT µF TWD ms 100 CT µF TWR ms 16 CT µF The above formulas become standard values in determining TPR TWD and TWR Reset hold time is compared below between the reduction circuit and the standard circuit b Standard usage CT 0 1 µF TPR reduction circuit Standard circuit TPR 10 ms 100 ms TW...

Страница 22: ...es connects from FF1 and FF2 outputs Q1 and Q2 to the NOR input Depending on timing these connections may not be necessary Example R1 R2 2 2 kΩ CT 0 1 µF RESET RESET CK GND RESET RESET CK GND S D3 CK3 R Q3 Q3 S D2 CK2 R Q2 Q2 S D1 CK1 R Q1 Q1 FF3 FF2 FF1 R2 R1 CK1 Q1 CK2 Q2 CK3 Q3 NOR Output Figure 1 Figure 2 Microprocessor ...

Страница 23: ...icroprocessor as its clock pulse When even one signal stops the relevant receiving flip flop stops operating As a result cyclical pulses are not generated at output Q3 Since the clock pulse stops arriving at the CK terminal of the MB3773 the MB3773 generates a reset signal Note that output Q3 frequency f will be in the following range where the clock frequencies of CK1 CK2 and CK3 are f1 f2 and f3...

Страница 24: ...ignal The lower frequency has already been set using CT When a clock pulse such as shown below is sent to terminal CK a short T2 prevents C2 voltage from reaching the CK input threshold level 1 25 V and will cause a reset signal to be output The T1 value can be found using the following formula Example Setting C and R allow the upper T1 value to be set See the table below VCC 5 V 1 2 3 4 8 7 6 5 C...

Страница 25: ... a conductive bag or container The work table tools and measuring instruments must be grounded The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series Do not apply a negative voltage Applying a negative voltage of 0 3 V or less to an LSI may generate a parasitic transistor resulting in malfunction ORDERING INFORMATION Part number Package Remarks MB3773P 8 pin plasti...

Страница 26: ... in parentheses are reference values C 1994 FUJITSU LIMITED D08006S 2C 3 0 89 0 35 0 30 0 30 0 40 9 40 0 0 99 1 52 0 30 0 014 012 035 370 012 016 060 0 012 012 0 039 4 36 172 MAX 3 00 118 MIN 2 54 100 TYP 0 46 0 08 018 003 0 25 0 05 010 002 0 51 020 MIN 7 62 300 TYP 15 MAX 1 PIN INDEX 6 20 0 25 244 010 0 30 ...

Страница 27: ...e tie bar cutting remainder Dimensions in mm inches Note The values in parentheses are reference values C 2002 FUJITSU LIMITED F08002S c 6 7 0 13 005 M Details of A part 7 80 0 40 5 30 0 30 209 012 307 016 250 008 010 0 20 0 25 6 35 INDEX 1 27 050 0 10 004 1 4 5 8 0 47 0 08 019 003 0 04 0 03 0 17 007 001 002 A 0 25 010 Stand off 0 8 Mounting height 2 00 0 25 0 15 079 010 006 0 50 0 20 020 008 0 60...

Страница 28: ...lues in parentheses are reference values C 1994 FUJITSU LIMITED S08010S 3C 2 1 52 0 30 0 INDEX 1 INDEX 2 0 35 0 15 19 65 0 0 30 0 99 006 014 774 039 0 012 012 0 060 2 54 100 TYP 0 50 0 08 020 003 4 00 0 30 157 012 8 20 0 30 323 012 6 20 0 25 244 010 128 010 3 26 0 25 0 25 0 05 010 002 ...

Страница 29: ...escribed in this document are designed developed and manufactured as contemplated for general use including without limitation ordinary industrial use general office use personal use and household use but are not designed developed and manufactured as contemplated 1 for use accompanying fatal risks or dangers that unless extremely high safety is secured could have a serious effect to the public an...

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