WATCHDOG TIMER V1.1
Chapter 4 Usage and Examples
MCU-AN-500013-E-11 – Page 10
4.2 Software watchdog timer
Setting Procedure Example
The software watchdog timer is set up through the following procedure:
1) Ensure that the address FFBE
H
, FFBF
H
values are “A596
H
” (NVR flash area)
2) Select the count clock.
(WDTC:CS1,CS0,CSP)
3) Activate the watchdog timer. (WDTC:WTE3 to WTE0 = 0101
B
)
4) Clear the watchdog timer within the minimum interval time. (WDTC:WTE3 to WTE0 =
0101
B
)
Refer Table 3-1.
The following example shows how to set up watchdog Timer for operation with software
mode.
main.c
startup.asm
Refer to Appendix Sample Code for project “SWWDT”.
Please note that once the watchdog timer is activated, it cannot be stopped until a reset is
generated.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. */
/* FUJITSU MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY */
/* FOR ANY ERRORS OR ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics (Shanghai) Co., LTD. */
/* Date: 20080320 Version: 1V0 Author: Levi */
/*--------------------------------------------------------------------*/
/* initial watchdog timer */
void
InitWDT (
void
)
{
WDTC = 0x05;
// set count clock is 2
21
/F
CH
// start WDT counter
}
/* main routine */
void
main (
void
)
{
InitWDT();
...
WDTC |= 0x05;
// clear WDT counter
}
#
define
HWD_DISABLE
;------------------------------------------------------------------------
; Hard Watchdog
;------------------------------------------------------------------------
#
ifdef
HWD_DISABLE
.SECTION WDT, CONST, LOCATE=H'FFBE
.DATA.W 0xA596
#
endif
