D2870 (RX600 S5)
Technical Manual
23
Features
Main memory
Memory architecture of RX600 S5
Figure 3: Memory architecture of RX600 S5
Each CPU comes with 2 internal memory controllers (so-called Mboxes). Each
memory board comes with two memory ’buffers on board’ (so-called BOBs).
Each BOB controls two memory channels (e.g. A, B or C,D). For performance
reasons two channels of different BOBs are used in parallel to access the
DIMMs. The DIMMS that are locked together this way as pairs are called
’lockstep pairs’.
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