FT8U2XXAM
High Speed USB Controllers for serial and FIFO applications
Future Technology Devices Intl. AN232-08 Rev 1.00 Page
2
2 . Bus powered schematic with extended reset period
If using a dedicated reset i.c. ( MAX809 etc ) many of whom have a extended reset time of
hundreds of milliseconds or when resetting the device from a MCU or other logic, there
are two areas which require careful consideration –
1. The 1.5k resistor on D+ indicates to USB that a full speed device is connected when the
device is hot plugged into a USB hub or host port. If the reset time is > 10ms from
plugging in the device, then there is a possibility that the device will still be held in reset at
the time that USB tries to enumerate the device. This will result in USB marking the device
as an “unknown device” as it is unable to enumerate it. The solution in this case is to
connect a NPN transistor in series with the 1.5k pull up so that the USB D+ line is not
pulled high until after the device comes out of reset. The base of the transistor is
connected to RESET# via a current limiting resistor.
2. For reliable 6MHz operation RCCLK must only go high after RESET# goes inactive.
Failure to do this will result in the internal x8 clock multiplier not always being enabled
correctly. The fix is simple – connect the 100k pullup on the RCCLK circuit to RESET#
instead of VCC. That way, RESET# will always go high before RCCLK regardless of the
period of the RESET time.
Important Note on using external Reset I.C.’s
When using a reset i.c. in this configuration select one that can drive out both high and
low. Some of these devices have open-collector like outputs that can only pull low.
RESET#
0.1uF
RCCLK
1.5K
USBDP (D+)
3v3OUT
Connections for RESET#, RCCLK and USBDP in an extended RESET# bus powered mode
2N3904
Transistor is used to
prevent supplying
current upstream until
the reset period is
over.
GND
100K
Long RESET#
20K
