
Appendix B
– Memory Map
Function
Bytes
32 Bit Address
CS#
Size
Reserved
Start
End
DDR_MCSN
NFC_CE0_B
256MB
2048MB
1MB
256KB
4KB
1KB
PSC1
PSC9
IMMRBAR Default
setting at reset
FF40 0000
DDR SDRAM
BOOT Space
EBC NAND
FLASH
Boot High
NAND FLASH
Upto 2GB
SRAM
USB ULPI 2.0 Device
Local Configuration
Registers
Rs232 on MPU
RS232 on TWR
IIC1
IIC2
Fast Ethernet
Controller
0x8000 0000
0x0000 0000
0xFFF0 0000
0x4000 0000
0x3000 0000
IMMR_0x3000
IMMR_0x1 0000
IMMR_0x1 1100
IMMR_0x1 1900
IMMR_0x0 1720
IMMR_0x0 1740
IMMR_0x0 2800
0x803F FFFF
0x0FFF FFFF
0xFFFF FFFF
0x400F FFFF
0x3001 FFFF
IMMR_3FFF
IMMR_0x1 01FF
IMMR_0x1 11FF
IMMR_0x1 19FF
IMMR_0x0 173F
IMMR_0x0 17FF
IMMR_0x0 2FFF
1M Recommend
4M For future
256MB
1MB
1MB
32KB
4KB
32B
32B
256B
The following memory map is only an example, refer to the MPC5125 Quick
Guide for specific memory map configurations, many of these memory map
settings are user defined.
29
TWR-MPC 5125
TWR-MPC5125 User Manual
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