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TWR-MPC 5125
TWR-MPC5125 User Manual
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semiconductor
5.0 Operation
5.1 Central Processing Unit
The MCP5125 provides the interface to local on board resources including:
NAND FLASH memory, DDR2-SDRAM memory, MII (10/100 Fast Ethernet
Controller), RMII (10/100 Fast Ethernet Controller), I2C (EEPROM), PSC
(programmable serial controller) for RS232 and AC97 (audio), Interrupt
controller, USB 2.0 (ULPI), Display Interface Unit (DIU) Controller, SD card
interface.
See MPC5125 user manual for detail descriptions for each interface.
5.2 Power supplies
The MPC5125 a5Volts only.
Power Sequencing
Power sequencing rules require that the IO voltage rail is powered before the
Core Voltages.
5.3 Resets
SW1 is a push button that provides a power on reset signal for the hardware
on the MPC5125
The MPC5125 POREST_B signal is used for the Configuration system and its
internal registers. It also is used for CPU power on reset.
5.3.1 Clocks
The main clock driver is a programmable clock synthesizer IC.
The SYS_CLK is the main processor clock (32.768 Mhz).
The 4Mhz is used by the Debug MCU.
The CLK_24.000Mhz is used by the CPU's internal USB circuitry.
The CLK_50.000Mhz is used by both the CPU's internal fast Ethernet circuitry
and the Ethernet PHY.
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