Symphony DSP56724/DSP56725 Multi-Core Audio Processors, Rev. 0
20-6
Freescale Semiconductor
Chip Configuration Module
Table 20-6. Field Descriptions, DSP56725
20.2.2.4
LPSC (EMC PLL Status and Control) Register
20.2.2.5
LPSC Register
The LPSC Control Register is shown in
1101
$D00000–$DFFFFF
1110
$E00000–$EFFFFF
1111
$F00000–$F7FFFF
Bit
Field
Description
23–0
Reserved
Write 0 for future compatibility.
Address
Y:FFFFE5
Access: User Read/Write
23
22
21
20
19
18
17
16
15
14
13
12
R
lpld
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
11
10
9
8
7
6
5
4
3
2
1
0
R
lpllpde
lpllod1
lpllod0
W
Reset
0
0
0
0
0
0
0
0
0
0
1
0
Figure 20-4. EMC PLL Status and Control Register (PSC), DSP56724
Table 20-5. External Peripherals X,Y,P Space Set by Burst Boundary (Continued)
External Device X,Y,P Burst Boundary
Address Range Not Bursted
Содержание Symphony DSP56724
Страница 22: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 1 10 Freescale Semiconductor Introduction ...
Страница 52: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 2 30 Freescale Semiconductor Signal Descriptions ...
Страница 112: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 7 12 Freescale Semiconductor Clock Generation Module CGM ...
Страница 244: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 14 6 Freescale Semiconductor Shared Bus Arbiter ...
Страница 246: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 15 2 Freescale Semiconductor Shared Memory Shared Memory ...