• Lane B: 2.5G SGMII port with AQR105 PHY
• Lane D: 1G SGMII port with RTL8211FS PHY
• USB 2.0 port:
• X1 USB2.0 port: connect to a type-A conector
• UART interface:
• UART interface: supports one UART at default 115200 Baud rate for
console display
• RJ-45 connector is used for the UART port
• Board connectors:
• JTAG/COP for T1023 debugging
• Push button for Board Reset
• Remote Reset Header
• Real-time clock on I2C bus
• Boot Source Selection:
• Supports NOR/SD/NAND/SPI boot by the selection of the dip switches
NOTE
Boot from eMMC will be supported in the next SDK
release.
• PoE:
• The power is enabled by default for all the boards. Turn off the power of one
PCIe card, if the external PoE power is not enough.
• PCB
• 6-layer routing (4-layer signals, 2-layer power and ground)
The below figure shows the T1023RDB-PC block diagram.
T1023RDB board features
QorIQ T1023 Reference Design Board User Guide, Rev. 0, 08/2015
8
Freescale Semiconductor, Inc.
Содержание QorIQ T1023
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