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Chapter 2

Architecture

This chapter explains the architecture of T1023RDB:

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SerDes interfaces (PCIe/SGMII/SATA)

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Ethernet controllers

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EC1 10/100/1000 BaseT interface (ETH1)

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SerDes lane D 10/100/1000 BaseT interface (ETH2)

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SerDes lane B 2.5G BaseT interface (ETH3)

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Connectors, Headers, Push buttons, and LEDs

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Switch settings

QorIQ T1023 Reference Design Board User Guide, Rev. 0, 08/2015

Freescale Semiconductor, Inc.

Содержание QorIQ T1023

Страница 1: ...QorIQ T1023 Reference Design Board User Guide Document Number T1023RDBUG Rev 0 08 2015...

Страница 2: ...QorIQ T1023 Reference Design Board User Guide Rev 0 08 2015 2 Freescale Semiconductor Inc...

Страница 3: ...4 2 6 Termination 15 2 7 SerDes interfaces PCIe SGMII SATA 15 2 7 1 PCI Express support 15 2 7 2 SGMII support 16 2 7 3 SerDes clock 16 2 8 EC1 10 100 1000 BaseT interface ETH1 16 2 9 SerDes lane D 10...

Страница 4: ...2 22 JTAG COP port 26 2 23 DMA 28 2 24 Connectors Headers Push buttons and LEDs 28 2 24 1 Connectors 28 2 24 2 Headers 29 2 24 3 Push buttons 30 2 24 4 LEDs 30 2 25 Switch settings 31 2 25 1 T1023RDB...

Страница 5: ...vice branch office router security appliance UTM and enterprise wireless access point This document describes the hardware features of the board including specifications block diagram connectors inter...

Страница 6: ...used in this document Table 1 2 Acronyms and abbreviations Usage Description COP Common On chip Processor CPC CoreNet Platform Cache CPLD Complex Programmable Logic Device DIMM Dual In Line Memory Mo...

Страница 7: ...r Transmitter VCC Voltage for Circuit VTT Voltage for Terminal 1 3 T1023RDB board features The T1023RDB board features are as follows T1023RDB runs at default core frequency 1 2 GHz platform clock 400...

Страница 8: ...te Reset Header Real time clock on I2C bus Boot Source Selection Supports NOR SD NAND SPI boot by the selection of the dip switches NOTE Boot from eMMC will be supported in the next SDK release PoE Th...

Страница 9: ...Block diagram 1 4 Specifications The table below lists the specifications of the T1023RDB PC Table 1 3 RDB specifications Characteristics Specifications Chassis Power requirements Maximum 60 W 12 V A...

Страница 10: ...Thickness 8504 mil 216 mm 6692 mil 170 mm 62 mil 1 5 T1023RDB PC board drawings The below figure shows the T1023RDB PC board diagram The board is 216 mm x 170 mm 8504 mil x 6692 mil Figure 1 2 T1023R...

Страница 11: ...interface ETH1 SerDes lane D 10 100 1000 BaseT interface ETH2 SerDes lane B 2 5G BaseT interface ETH3 Ethernet management Ethernet ports I2C IFC eSPI interface eSDHC interface GPIO interface Interrup...

Страница 12: ...1 8 V DDR The memory interface power VPP VTT GVDD and VREF are sourced from VR500 VR500_2V5 for VPP 2 5 V VR500_VTT for VTT 0 6 V VR500_1V2 for GVDD 1 2 V and VR500_VREF for VREF 0 6 V SerDes The Ser...

Страница 13: ...V 1 2 V 2 1 V 2 5 V 0 85 V is sourced from part LTC3605A rail is DCDC_V85 1 2 V is sourced from part LT3021 rail is LDO_1V2 2 1 V is sourced from another LT3021 part rail is LDO_2V1 2 5 V is sourced...

Страница 14: ...terface uses the SSTL driver receiver and 1 2 V power A VREF 1 2V 2 is needed for all SSTL receivers in the DDR4 interface A VPP 2 5 V is need for DDR4 which is used for activating power supply For de...

Страница 15: ...esistor 2 7 SerDes interfaces PCIe SGMII SATA T1023 processor supports the SGMII 2 5G SGMII and PCI Express high speed I O interface standards The table below details the SerDes connections Table 2 1...

Страница 16: ...e in 1G SGMII mode The Serial gigabit media independent interface SGMII is a high speed interface linking the Ethernet controller with an Ethernet PHY SGMII uses differential signalling for electrical...

Страница 17: ...DIO RTL8211FS GBE PHY MDIO PHY Address 3 RJ 45 Port ETH2 Figure 2 5 SGMII interface connection 2 10 SerDes lane B 2 5G BaseT interface ETH3 SerDes lane B is set to operate in 2 5G SGMII and is directl...

Страница 18: ...the Ethernet ports are connected on the backside of the RDB chassis ETH3 PoE port is same as the PoE power port ETH1 ETH2 ETH3 PoE Figure 2 7 Ethernet port connection 2 13 I2C The T1023 device has two...

Страница 19: ...for selecting NOR BANK I2C Address 0x20 Figure 2 8 I2C subsystem The table below shows all the I2C device and address information on T1023RDB PC Table 2 3 I2C Bus connections I2C Bus I2C Address Manu...

Страница 20: ...owing modules are connected to the IFC 128 MB NOR flash memory 512 MB NAND flash memory NOTE Silicon IFC_NOR 28 bit addressing mode is not functional with Asynchronous non ADM NOR For more details see...

Страница 21: ...ry through its NAND Flash control machine FCM The T1023RDB PC implements an 8 bit NAND flash with 512 MB in size The figure below shows the NAND flash memory connection T1023 IFC Controller IFC_CLE IF...

Страница 22: ...onnection eSPI chip select Manufacturer Part Comment SPI_Flash_CS0_N Spansion S25FL512SAGMFI010 64 MB Spansion SPI flash default 2 16 eSDHC interface The enhanced SD host controller eSDHC provides an...

Страница 23: ...in usage GPIO Input Output Signal name Comment GPIO1_14 output GPIO1_14_eMMC_SEL_n 0 Select eMMC 1 Select SD MMC card GPIO3_04 input Board version identifying bit 1 Rev B 0 Rev C 0 Rev D 1 Rev E 1 GPI...

Страница 24: ...ard Pull up 2 19 USB interface On T1023RDB PC there is one USB interface and the USB PHY is integrated in the T1023 device The board features are Complies with USB Specification Rev 2 0 High speed 480...

Страница 25: ...oftware programmable baud generators Divide the platform clock 2 by 1 to 2 16 1 Generate a 16x clock for the transmitter and receiver engines Clear to send CTS and Ready to send RTS modem control func...

Страница 26: ...1 RTS 8 2 NC 3 TXD 2 4 GND 5 5 GND 5 6 RXD 3 7 NC 8 CTS 7 2 21 POR configuration The POR configuration is based on switch setting When Power on reset POR is asserted the RCW source POR configuration i...

Страница 27: ...ator setup The 16 pin generic header connector carries the COP JTAG signals and connect T1023 using level shift and the additional signals for system debugging The pin out of this connector is shown i...

Страница 28: ...nected between the processor and JTAG COP connector 12 GND Connected to ground 13 HRESET Connected between the processor and JTAG COP connector 14 NC Not connected 15 CKSTP_OUT Connected directly betw...

Страница 29: ...to maintain the data inside the RTC The battery holder BT1 accommodates a CR 2032 The below figure shows how to insert a battery 1 Insert 2 Press CR 2032 Lithium Battery Battery Holder Figure 2 17 Ba...

Страница 30: ...3 Turn OFF PCIe 2 PA power if 12 V adapter not present 1 2 Always ON Default J25 PCIe1 PA power setting 1 2 5 V CUS239 Default 3 4 4 5 V CUS260 5 6 3 5 V CUS238 7 8 3 3 V CUS240 J27 PCIe2 PA power se...

Страница 31: ...e configuration using switches The below table lists options for RCW source configuration Table 2 14 T1023RDB PC RCW source configuration options SW1 1 8 SW2 1 cfg_rcw_src 0 8 RCW source Remark ON ON...

Страница 32: ...ainit Unused 1 SW2 5 IFC_A16 cfg_svr0 1 SW2 6 IFC_A17 cfg_svr1 1 SW2 7 unused SW2 8 IFC_AVD cfg_rsp_dis Unused default set bit to 1 1 SW3 1 IFC_OE_N cfg_eng_use1 Set system clock input type Set 0 for...

Страница 33: ...arizes the revisions to this document Table A 1 Revision history Revision Date Topic cross reference Change description Rev 0 08 2015 Initial Public Release QorIQ T1023 Reference Design Board User Gui...

Страница 34: ...QorIQ T1023 Reference Design Board User Guide Rev 0 08 2015 34 Freescale Semiconductor Inc...

Страница 35: ...pical parameters that may be provided in Freescale data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters includ...

Страница 36: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information NXP T1023RDB PC...

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