Hardware Reference
Microcontroller
M68HC12A4EVB Evaluation Board — Rev. 1
User’s Manual
MOTOROLA
Hardware Reference
85
The special peripheral mode of operation is a test mode. The CPU is not active.
On-chip peripherals may be accessed directly by an external bus master. It is not
possible to change from or to this mode without going through reset.
The special expanded wide, special expanded narrow, and special single-chip
modes provide basically the same functionality as the respective normal modes.
These special modes are primarily for testing and provide access to several key
features, including:
•
Special expanded narrow — To view 16-bit accesses without changing
the instruction cycle times, port D may be used to view the upper eight
bits of the data bus.
•
Special single chip — Background debug mode is immediately active
out of reset. Execution begins from the background debug ROM.
Commands are sent to the CPU through the background debug interface
pin. A background debug interface is required, as described in
4.13
Background Debug Mode (BDM) Interface
.
For more information on the CPU, refer to the CPU12 Reference Manual,
Motorola document order number CPU12RM/AD.
Table 4-2. CPU Mode Selection
BKGD
Header W30
MODB
Header W34
MODA
Header W42
Mode Description
0
(2)
0
(2)
0
(2)
Special single chip
0
(2)
0
(2)
1
(1)
Special expanded narrow
0
(2)
1
(1)
0
(2)
Special peripheral
0
(2)
1
(1)
1
(1)
Special expanded wide
1
(1)
0
(2)
0
(2)
Normal single chip
1
(1)
0
(2)
1
(1)
Normal expanded narrow
1
(1)
1
(1)
0
(2)
Reserved (currently defaults to
peripheral mode)
1
(1)
1
(1)
1
(1)
Normal expanded wide
(1)
Install jumper on header pins 2 and 3.
(2)
Install jumper on header pins 1 and 2.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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