KT33926UG, Rev. 2.0
Freescale Semiconductor
9
Evaluation Board Hardware Description
11.2
I/O Jumper Definitions (J3)
The EVB contains seven jumpers that connect the inputs of the 33926 as follows (
Bold
= factory setting):
The DATA0 -DATA4 signals are parallel outputs from the USB/SPI Dongle that can be controlled directly
from the SPIGen program. The BGD0 - BGD3 signals are the outputs of the MC33810 pre-drivers (GD0
-GD3) after being buffered by discrete MOSFETS. (See the schematic for detailed information) The GD0
- GD3 outputs can be set-up to provide a PWM signal, to vary the H-Bridge output. The buffered PWM
signals (BGD0 - BGD3)can be selected via the jumpers to be connected to the Input 1, Input 2, Disable_1
or Disable_2B inputs. This flexibility is provided to illustrate the many ways the MC33926 can be driven
to achieve the same result. An example configuration file called
“MC33926_EVB_CONFIGURATION_FILE.spi” is provided on the CD which contains batch file
examples. In these batch file examples are the instructions to set-up the MC33810 to PWM the GDx
outputs. The MC33810 data sheet (also on the CD provided) describes, in detail, the way to set the PWM
frequency and duty cycle for each of the GD outputs (and corresponding BGDx outputs).
If the user prefers to supply the various MC33926 input signals externally, other than from the USB-SPI
Interface or the PWM signals (BGDx), the jumpers can be removed and connections can be made to the
open pin number 2’ s.
11.3
USB/SPI Dongle Connector
The USB/SPI dongle connector is a 16 pin,.1” center, dual-row connector that is designed to interface
directly to the USB/SPI Dongle unit. The USB/SPI dongle connector consists of the following 16 pins:
NAME
Position
Connection
INPUT 1
1-2/DATA0
2-3/BGD0
INPUT 12
1-2/DATA1
2-3/BGD1
INVERT
1-2/GND
2-3/DATA4
ENABLE
1-2/GND
2-3/VDD
DISABLE_1
1-2/GND
2-3/BGD2
DISABLE_2B
1-2/VDD
2-3/BGD3
SLEW
1-2/GND
2-3/VDD
Number
Name
Description
1
CSB
SPI signal, Chip Select Bar
2
CNTL2
Parallel port signal CNTL2
3
SO
SPI signal, Serial Out
4
CNTL1
Parallel port signal CNTL1
5
SI
SPI signal, Serial In
6
CNTL0
Parallel port signal CNTL0
Содержание KIT33926PNBEVBE
Страница 13: ...KT33926UG Rev 2 0 Freescale Semiconductor 13 Schematic 12 Schematic ...
Страница 14: ...KT33926UG Rev 2 0 14 Freescale Semiconductor Board Layout 13 Board Layout 13 1 Assembly Layer Top ...
Страница 15: ...KT33926UG Rev 2 0 Freescale Semiconductor 15 Board Layout 13 2 Assembly Layer Bottom ...
Страница 16: ...KT33926UG Rev 2 0 16 Freescale Semiconductor Board Layout 13 3 Top Layer Routing ...
Страница 17: ...KT33926UG Rev 2 0 Freescale Semiconductor 17 Board Layout 13 4 Inner Layer 1 Routing ...
Страница 18: ...KT33926UG Rev 2 0 18 Freescale Semiconductor Board Layout 13 5 Inner layer 2 Routing ...
Страница 19: ...KT33926UG Rev 2 0 Freescale Semiconductor 19 Board Layout 13 6 Bottom Layer Routing ...