Distributor of NXP Semiconductors: Excellent Integrated System Limited
Datasheet of DSP56F803EVM - KIT EVALUATION FOR DSP56F803
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Power Supply
Technical Summary, Rev. 5
Freescale Semiconductor
2-11
2.9 Reset
Logic is provided in the 56F803 to generate a clean power-on RESET signal. Additional,
reset logic is provided to support the RESET signals from the JTAG connector, the
Parallel JTAG Interface and the user RESET push-button; see
Figure 2-7
.
Figure 2-7. Schematic Diagram of the RESET Interface
2.10 Power Supply
The main power input, +12V DC at 4.0A, to the 56F803EVM is through a 2.1mm coax
power jack. A 4.0A power supply is provided with the 56F803EVM; however, less than
500mA is required by the EVM. The remaining current is available for user motor control
applications. The 56F803EVM pr3.3V DC voltage regulation for the device,
memory, RS-232, CAN, parallel JTAG interface and supporting logic; refer to
Figure 2-8
.
Power applied to the 56F803EVM is indicated with a Power-On LED, referenced as
LED1.
Figure 2-8. Schematic Diagram of the Power Supply
RESET
PUSHBUTTON
MANUAL RESET
P_RESET
RESET
+3.3V
+12V DC
+5.0V
Regulator
+3.3V
Regulator
+5.0V DC
+3.3V DC
56F803
56F803EVM
PARTS
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28 / 69
