Fluke 87 V/AN, Руководство по обслуживанию

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87 V/AN
Service Manual
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sense lines PB1, PB2 & PB3 with one switch from each strobe group per sense line. U2
pulls each strobe line to -2.5 V in sequence and monitors the sense lines. U2 can
determine which switch is closed, debounce and handle multiple switch closures.
Microprocessor & Support Circuits
U2 is the microprocessor and Y1 is the crystal used for the clock generator that is
internal to U2. The 32.768-kHz oscillator is multiplied to above 1 MHz inside U2 when
the Meter is not in sleep mode. This low oscillator frequency helps reduce the standby
power required by U2 while the Meter is in sleep mode. C17, C18, C19, C25, C27 &
C29 are power supply bypass capacitors.
R21 & C8 form the power on reset circuit that holds the RST* signal to U2 at logic low
until C8 is charged to logic high on the way to 3.3 V (-2.5 V to +0.8 V).
U14 is an AND gate that allows the signal ODCMP from COMP_O (U1 pin 24) to gate
the SMCLK signal from U2 back to the DCMP input of U2 to facilitate the measurement
of duty cycle. When U2 sets SMCLK to logic high (+0.8 V), the ODCMP signal is
counted by U2 and frequency is measured. When U2 drives SMCLK with an
approximately 1-MHz clock, this signal appears at DCMP only when ODCMP is logic
high (+0.8 V). The frequency of the signal ODCMP is measured directly while the
multiple positive periods are measured referenced to the SMCLK. U2 uses the frequency
of ODCMP and the accumulated time that the signal was high to compute both the
positive and negative duty cycle.
LCD
U11 is a liquid crystal display (LCD) with four back planes that are multiplexed by U2
with the COM0-3 signals. Only 34 of the possible 40 segment drivers of U2 are
connected to U11 and not all combinations of segments and back planes are used.
R20, R25, R26, R27, R41 & RT2 form a temperature-compensated voltage divider used
to generate the four voltage levels used by the display multiplexer internal to U2. As the
temperature of the Meter is increased, U11 requires less total voltage to maintain the
desired contrast ratio. RT1 is a negative temperature coefficient device, so as the
temperature increases the total current through R27 increases and the voltage across R20,
R25 & R26 decreases, thereby maintaining the display contrast ratio. The opposite
occurs as the temperature lowers.
Backlight
DS3, R14, R46, R50, R96, R99, Q4, Q8 & Q17 form the backlight and backlight control
circuit. The microprocessor holds the backlight off or can turn it on with two levels of
intensity available. When the BKLT and HIBEAM signals from U2 are at logic low
(-2.5 V), Q4, Q8 & Q17 are off, allowing no current to flow through DS3. When U2
drives BKLT to logic high (+0.8 V), Q4 & Q8 are turned on. The current through DS3 is
set by R50, R96 and Q8, and regulated by Q4, which adjusts the base current of Q8 to
keep the voltage drop across R50 & R96 equal to the voltage drop across R46. When U2
drives HIBEAM to logic high (+0.8 V), Q17 is turned on and partially bypasses R96,
thereby requiring more current through R50 to keep the voltage across R50, R96 and
Q17 equal to the drop across R46 resulting in a brighter backlight.
Beeper
LS1, R19, R44, R47, R108, C11, Q5 & U5 form the beeper and beeper control circuit.
When the BPR signal from U2 is at logic low (-2.5 V), Q5 is off, which disconnects the
negative power supply connection of U5 disabling the beeper oscillator and drive circuit.
When the BPR signal from U2 is at logic high (+0.8 V), Q5 is on, which allows U5 to
power up. Pin 2 of piezoelectric beeper LS1 is driven by the parallel combination of two
U5 inverters and pin 1 of LS1 is driven by two more U5 inverters to supply enough